MSC8103 Freescale Semiconductor / Motorola, MSC8103 Datasheet - Page 15

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MSC8103

Manufacturer Part Number
MSC8103
Description
Network Digital Signal Processor
Manufacturer
Freescale Semiconductor / Motorola
Datasheet

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Freescale Semiconductor
IRQ1
DP1
EXT_BG2
IRQ2
DP2
EXT_DBG2
IRQ3
DP3
EXT_BR3
IRQ4
DP4
DREQ3
EXT_BG3
Signal
Input
Input/Output
Output
Input
Input/Output
Output
Input
Input/Output
Input
Input
Input/Output
Input
Output
Data Flow
Table 1-5.
MSC8103 Network Digital Signal Processor, Rev. 12
Interrupt Request 1
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 1
The agent that drives the data bus also drives the data parity signals. The value driven on the data
parity one pin should give odd parity (odd number of ones) on the group of signals that includes data
parity 1 and D[8–15].
External Bus Grant 2
The MSC8103 asserts this pin to grant bus ownership to an external bus master.
Interrupt Request 2
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 2
The agent that drives the data bus also drives the data parity signals. The value driven on the data
parity two pin should give odd parity (odd number of ones) on the group of signals that includes data
parity 2 and D[16–23].
External Data Bus Grant 2
The MSC8103 asserts this pin to grant data bus ownership to an external bus master.
Interrupt Request 3
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 3
The agent that drives the data bus also drives the data parity signals. The value driven on the data
parity three pin should give odd parity (odd number of ones) on the group of signals that includes
data parity 3 and D[24–31].
External Bus Request 3
An external master asserts this pin to request bus ownership from the internal arbiter.
Interrupt Request 4
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 4
The agent that drives the data bus also drives the data parity signals. The value driven on the data
parity four pin should give odd parity (odd number of ones) on the group of signals that includes data
parity 4 and D[32–39].
DMA Request 3
An external peripheral uses this pin to request DMA service.
External Bus Grant 3
The MSC8103 asserts this pin to grant bus ownership to an external bus master.
System Bus, HDI16, and Interrupt Signals (Continued)
1
1
1
1
1
1
1
1
1
1,2
1,2
1,2
1,2
Description
System Bus, HDI16, and Interrupt Signals
1-11

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