PIC17C756A-33/L Microchip Technology Inc., PIC17C756A-33/L Datasheet - Page 71

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PIC17C756A-33/L

Manufacturer Part Number
PIC17C756A-33/L
Description
68 PIN, 32 KB OTP, 902 RAM, 50 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC17C756A-33/L

A/d Inputs
12-Channel, 10-Bit
Cpu Speed
8.25 MIPS
Eeprom Memory
0 Bytes
Input Output
52
Interface
I2C/SPI/USART
Memory Type
OTP
Number Of Bits
8
Package Type
68-pin PLCC
Programmable Memory
32K Bytes
Ram Size
902 Bytes
Speed
16 MHz
Timers
2-8-bit, 2-16-bit
Voltage, Range
3-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

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10.0
PIC17C75X devices have seven I/O ports, PORTA
through PORTG. PIC17C76X devices have nine I/O
ports, PORTA through PORTJ. PORTB through
PORTJ have a corresponding Data Direction Register
(DDR), which is used to configure the port pins as
inputs or outputs. Some of these ports pins are multi-
plexed with alternate functions.
PORTC, PORTD, and PORTE are multiplexed with the
system bus. These pins are configured as the system
bus when the device’s configuration bits are selected to
Microprocessor or Extended Microcontroller modes. In
the two other microcontroller modes, these pins are
general purpose I/O.
PORTA, PORTB, PORTE<3>, PORTF, PORTG and
the upper four bits of PORTH are multiplexed with the
peripheral features of the device. These peripheral fea-
tures are:
• Timer Modules
• Capture Modules
• PWM Modules
• USART/SCI Modules
• SSP Module
• A/D Module
• External Interrupt pin
2000 Microchip Technology Inc.
I/O PORTS
When some of these peripheral modules are turned on,
the port pin will automatically configure to the alternate
function. The modules that do this are:
• PWM Module
• SSP Module
• USART/SCI Module
When a pin is automatically configured as an output by
a peripheral module, the pins data direction (DDR) bit
is unknown. After disabling the peripheral module, the
user should re-initialize the DDR bit to the desired con-
figuration.
The other peripheral modules (which require an input)
must have their data direction bits configured appropri-
ately.
When the device enters the “RESET state”, the Data
Direction registers (DDR) are forced set, which will
make the I/O hi-impedance inputs. The RESET state of
some peripheral modules may force the I/O to other
operations, such as analog inputs or the system bus.
Note:
A pin that is a peripheral input, can be con-
figured as an output (DDRx<y> is cleared).
The peripheral events will be determined
by the action output on the port pin.
PIC17C7XX
DS30289B-page 71

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