PIC17C756A-33/L Microchip Technology Inc., PIC17C756A-33/L Datasheet - Page 181

• Manufacturer Part Number: PIC17C756A-33/L
• Description: 68 PIN, 32 KB OTP, 902 RAM, 50 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC17C756A-33/L

• A/d Inputs: 12-Channel, 10-Bit
• Cpu Speed: 8.25 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 52
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 32K Bytes
• Ram Size: 902 Bytes
• Speed: 16 MHz
• Timers: 2-8-bit, 2-16-bit
• Voltage, Range: 3-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

The ADRESH:ADRESL registers contain the 10-bit
result of the A/D conversion. When the A/D conversion
is complete, the result is loaded into this A/D result reg-
ister pair, the GO/DONE bit (ADCON0<2>) is cleared
and A/D interrupt flag bit, ADIF is set. The block
diagrams of the A/D module are shown in Figure 16-1.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding DDR bits selected as inputs.
To determine sample time, see Section 16.1. After this
acquisition time has elapsed, the A/D conversion can
be started. The following steps should be followed for
doing an A/D conversion:
1.
FIGURE 16-1:
2000 Microchip Technology Inc.
Configure the A/D module:
a)
b)
c)
d)
Configure analog pins/voltage reference/
and digital I/O (ADCON1)
Select A/D input channel (ADCON0)
Select A/D conversion clock (ADCON0)
Turn on A/D module (ADCON0)
Note 1: These channels are only available on PIC16C76X devices.
Converter
A/D
(Reference
Voltage)
A/D BLOCK DIAGRAM
V
V
REF
REF
+
-
(Input Voltage)
V
IN
PCFG0
AV
DD
2.
3.
4.
5.
6.
7.
AV
Configure A/D interrupt (if desired):
a)
b)
c)
Wait the required acquisition time.
Start conversion:
a)
Wait for A/D conversion to complete, by either:
a)
OR
b)
Read
(ADRESH:ADRESL), clear bit ADIF, if required.
For next conversion, go to step 1 or step 2, as
required. The A/D conversion time per bit is
defined as T
required before next acquisition starts.
SS
Clear ADIF bit
Set ADIE bit
Clear GLINTD bit
Set GO/DONE bit (ADCON0)
Polling for the GO/DONE bit to be cleared
Waiting for the A/D interrupt
CHS3:CHS0
A/D
AD
1010
1001
1000
0001
0000
1011
1011
1011
1011
1011
0111
0110
0101
0100
0011
0010
. A minimum wait of 2T
Result
PIC17C7XX
DS30289B-page 181
register
AN1/V
AN0/V
AN15
AN14
AN13
AN12
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
(1)
(1)
(1)
(1)
REF
REF
AD
-
+
pair
is