PIC17C756A-33/L Microchip Technology Inc., PIC17C756A-33/L Datasheet - Page 105

• Manufacturer Part Number: PIC17C756A-33/L
• Description: 68 PIN, 32 KB OTP, 902 RAM, 50 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC17C756A-33/L

• A/d Inputs: 12-Channel, 10-Bit
• Cpu Speed: 8.25 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 52
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 32K Bytes
• Ram Size: 902 Bytes
• Speed: 16 MHz
• Timers: 2-8-bit, 2-16-bit
• Voltage, Range: 3-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

13.1.2
To select 16-bit mode, set the T16 bit. In this mode,
TMR2 and TMR1 are concatenated to form a 16-bit
timer (TMR2:TMR1). The 16-bit timer increments until
it matches the 16-bit period register (PR2:PR1). On the
following timer clock, the timer value is reset to 0h, and
the TMR1IF bit is set.
When selecting the clock source for the 16-bit timer, the
TMR1CS bit controls the entire 16-bit timer and
TMR2CS is a “don’t care”, however, ensure that
TMR2ON is set (allows TMR2 to increment). When
TMR1CS is clear, the timer increments once every
instruction cycle (F
timer increments on every falling edge of the RB4/
TCLK12 pin. For the 16-bit timer to increment, both
TMR1ON and TMR2ON bits must be set (Table 13-2).
TABLE 13-2:
FIGURE 13-2:
T16 TMR2ON TMR1ON
1
1
1
0
2000 Microchip Technology Inc.
RB4/TCLK12
1
0
x
1
TIMER1 AND TIMER2 IN 16-BIT
MODE
TURNING ON 16-BIT TIMER
OSC
1
1
0
1
TMR2 AND TMR1 IN 16-BIT TIMER/COUNTER MODE
F
/4). When TMR1CS is set, the
Set Interrupt TMR1IF
OSC
TMR1CS
(TCON1<0>)
(PIR1<4>)
/4
16-bit timer
(TMR2:TMR1) ON
Only TMR1 increments
16-bit timer OFF
Timers in 8-bit mode
0
1
Result
(TCON2<0>)
TMR1ON
RESET
Equal
TMR2 x 8
PR2 x 8
13.1.2.1
When TMR1CS is set, the 16-bit TMR2:TMR1 incre-
ments on the falling edge of clock input TCLK12. The
input on the RB4/TCLK12 pin is sampled and synchro-
nized by the internal phase clocks twice every instruc-
tion cycle. This causes a delay from the time a falling
edge
TMR2:TMR1 is actually incremented. For the external
clock input timing requirements, see the Electrical
Specification section.
MSB
Comparator x16
Comparator<8>
appears
External Clock Input for
TMR2:TMR1
TMR1 x 8
PR1 x 8
on
LSB
RB4/TCLK12
PIC17C7XX
DS30289B-page 105
to
the
time