PIC17C756A-33/L Microchip Technology Inc., PIC17C756A-33/L Datasheet - Page 295

• Manufacturer Part Number: PIC17C756A-33/L
• Description: 68 PIN, 32 KB OTP, 902 RAM, 50 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC17C756A-33/L

• A/d Inputs: 12-Channel, 10-Bit
• Cpu Speed: 8.25 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 52
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 32K Bytes
• Ram Size: 902 Bytes
• Speed: 16 MHz
• Timers: 2-8-bit, 2-16-bit
• Voltage, Range: 3-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

SEEVAL Evaluation and Programming System................ 236
Serial Clock, SCK ............................................................. 137
Serial Clock, SCL .............................................................. 144
Serial Data Address, SDA................................................. 144
Serial Data In, SDI ............................................................ 137
Serial Data Out, SDO........................................................ 137
SETF ................................................................................. 224
SFR ................................................................................... 198
SFR (Special Function Registers)....................................... 43
SFR As Source/Destination .............................................. 198
Signed Math ........................................................................ 11
Slave Select Synchronization ........................................... 140
Slave Select, SS ............................................................... 137
SLEEP ...................................................................... 194, 225
SLEEP Mode, All Peripherals Disabled ............................ 273
SLEEP Mode, BOR Enabled ............................................ 273
SMP .................................................................................. 134
Software Simulator (MPLAB SIM)..................................... 234
SPBRG ............................................................. 126, 130, 132
SPBRG1 ....................................................................... 27, 48
SPBRG2 ....................................................................... 27, 49
SPE ................................................................................... 136
Special Features of the CPU ............................................ 191
Special Function Registers ......................................... 43, 198
Special Function Registers, File Map ................................. 47
SPI
SPI Clock Edge Select, CKE ............................................ 134
SPI Data Input Sample Phase Select, SMP ..................... 134
SPI Master/Slave Connection ........................................... 138
SPI Module
SS ..................................................................................... 137
SSP ................................................................................... 133
SSP I
SSP Module
SSP Overflow Detect bit, SSPOV ..................................... 144
SSPADD ............................................................................. 50
SSPBUF...................................................................... 50, 144
SSPCON1 ........................................................... 50, 135, 143
SSPCON2 ................................................................... 50, 136
SSPEN .............................................................................. 135
2000 Microchip Technology Inc.
Summary..................................................................... 48
Master Mode ............................................................. 139
Serial Clock............................................................... 137
Serial Data In ............................................................ 137
Serial Data Out ......................................................... 137
Serial Peripheral Interface (SPI) ............................... 133
Slave Select .............................................................. 137
SPI clock ................................................................... 139
SPI Mode .................................................................. 137
Master/Slave Connection.......................................... 138
Slave Mode ............................................................... 140
Slave Select Synchronization ................................... 140
Slave Synch Timing .................................................. 140
Block Diagram (SPI Mode) ....................................... 137
SPI Mode .................................................................. 137
SSPADD ........................................................... 144, 145
SSPBUF............................................................ 139, 144
SSPCON1................................................................. 135
SSPCON2................................................................. 136
SSPSR.............................................................. 139, 144
SSPSTAT.......................................................... 134, 144
SSP I
SPI Master Mode ...................................................... 139
SPI Master/Slave Connection ................................... 138
SPI Slave Mode ........................................................ 140
SSPCON1 Register .................................................. 143
2
C
2
C Operation.................................................... 143
SSPIE ................................................................................. 36
SSPIF ......................................................................... 38, 145
SSPM3:SSPM0 ................................................................ 135
SSPOV ............................................................. 135, 144, 162
SSPSTAT ........................................................... 50, 134, 144
ST Input ............................................................................ 278
Stack
START bit (S) ................................................................... 134
START Condition Enabled bit, SAE.................................. 136
STKAV .......................................................................... 52, 54
STOP bit (P) ..................................................................... 134
STOP Condition Enable bit............................................... 136
SUBLW ............................................................................. 225
SUBWF............................................................................. 226
SUBWFB .......................................................................... 226
SWAPF ............................................................................. 227
Synchronous Master Mode............................................... 127
Synchronous Master Reception........................................ 129
Synchronous Master Transmission .................................. 127
Synchronous Serial Port ................................................... 133
Synchronous Serial Port Enable bit, SSPEN.................... 135
Synchronous Serial Port Interrupt....................................... 38
Synchronous Serial Port Interrupt Enable, SSPIE.............. 36
Synchronous Serial Port Mode Select bits,
SSPM3:SSPM0 ................................................................ 135
Synchronous Slave Mode................................................. 131
T
T0CKI ................................................................................. 39
T0CKI Pin ........................................................................... 40
T0CKIE ............................................................................... 34
T0CKIF ............................................................................... 34
T0CS ............................................................................ 53, 97
T0IE .................................................................................... 34
T0IF .................................................................................... 34
T0SE............................................................................. 53, 97
T0STA ................................................................................ 53
T16 ................................................................................... 101
Table Latch ......................................................................... 55
Table Pointer ...................................................................... 55
Table Read
Table Write
TABLRD ................................................................... 227, 228
TABLWT ................................................................... 228, 229
T
TBLATH .............................................................................. 55
TBLATL .............................................................................. 55
TBLPTRH ........................................................................... 55
TBLPTRL ............................................................................ 55
TCLK12 ............................................................................ 101
TCLK3 .............................................................................. 101
TCON1 ......................................................................... 28, 49
TCON2 ............................................................................... 49
TCON2,TCON3 .................................................................. 28
TCON3 ....................................................................... 50, 103
Time-Out Sequence............................................................ 25
Timer Resources ................................................................ 95
AD
................................................................................... 185
Operation.................................................................... 54
Pointer ........................................................................ 54
Stack........................................................................... 43
Example...................................................................... 64
Table Reads Section .................................................. 64
TLRD .......................................................................... 64
Code ........................................................................... 62
Timing......................................................................... 62
To External Memory ................................................... 62
PIC17C7XX
DS30289B-page 295