PIC17C756A-33/L Microchip Technology Inc., PIC17C756A-33/L Datasheet - Page 259

• Manufacturer Part Number: PIC17C756A-33/L
• Description: 68 PIN, 32 KB OTP, 902 RAM, 50 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC17C756A-33/L

• A/d Inputs: 12-Channel, 10-Bit
• Cpu Speed: 8.25 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 52
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 32K Bytes
• Ram Size: 902 Bytes
• Speed: 16 MHz
• Timers: 2-8-bit, 2-16-bit
• Voltage, Range: 3-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

FIGURE 20-18:
TABLE 20-13: I
Param
Note 1: Maximum pin capacitance = 10 pF for all I
100
101
102
103
106
107
109
2000 Microchip Technology Inc.
No.
90
91
92
2: A fast mode (400 KHz) I
3: C
4: Max specifications for these parameters are valid for falling edge only. Specs are characterized with R
Thd:dat
Thd:sta
Tsu:dat
Tsu:sta
Tsu:sto
SDA
Out
Thigh
SDA
In
Tlow
SCL
Sym
must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If
such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line.
Parameter #102 + #107 = 1000 + 250 = 1250 ns (for 100 kHz mode) before the SCL line is released.
is characterized with R
These are only valid for fast mode operation (V
C
Taa
Note:
Tr
Tf
b
b
=400pF for standard mode, 200pF for fast mode, and 10pF for 1MHz mode.
is specified to be from 10-400pF. The minimum specifications are characterized with C
Clock high time
Clock low time
SDA and SCL rise time 100 kHz mode
SDA and SCL fall time
START condition setup
time
START condition hold
time
Data input hold time
Data input setup time
STOP condition
setup time
Output valid from clock 100 kHz mode
2
C BUS DATA REQUIREMENTS
Refer to Figure 20-5 for load conditions.
I
2
90
C BUS DATA TIMING
103
91
Characteristic
p
=R
2
C bus device can be used in a standard mode I
p
109
min. The minimum fall time specification (t
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
400 kHz mode
1 MHz mode
2
100
C pins.
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
106
DD
=4.5-5.5V) and where the SPM bit (SSPSTAT<7>) =1.)
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
101
109
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
20 + 0.1Cb
20 + 0.1Cb
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
Min
250
100
100
—
—
—
—
—
—
—
0
0
0
107
f
) is characterized with C
2
C bus system, but the parameter # 107
1000
3500
1000
Max
300
300
300
300
400
0.9
10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PIC17C7XX
92
b
=10pF. The rise time spec (t
102
Cb is specified to be from
10 to 400 pF
Cb is specified to be from
10 to 400 pF
Only relevant for Repeated
Start condition
After this period, the first
clock pulse is generated
(Note 2)
b
=10pF,and R
110
DS30289B-page 259
Conditions
p
=R
p
min and
p
=R
p
250 ns
max.
r
)