PIC17C756A-33/L Microchip Technology Inc., PIC17C756A-33/L Datasheet - Page 214
PIC17C756A-33/L
Manufacturer Part Number
PIC17C756A-33/L
Description
68 PIN, 32 KB OTP, 902 RAM, 50 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC17C756A-33L.pdf
(304 pages)
Specifications of PIC17C756A-33/L
A/d Inputs
12-Channel, 10-Bit
Cpu Speed
8.25 MIPS
Eeprom Memory
0 Bytes
Input Output
52
Interface
I2C/SPI/USART
Memory Type
OTP
Number Of Bits
8
Package Type
68-pin PLCC
Programmable Memory
32K Bytes
Ram Size
902 Bytes
Speed
16 MHz
Timers
2-8-bit, 2-16-bit
Voltage, Range
3-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C756A-33/L
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC17C756A-33/L
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC17C756A-33/L-G
Manufacturer:
MICOROCHIP
Quantity:
20 000
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PIC17C7XX
INFSNZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
Example:
DS30289B-page 214
Before Instruction
After Instruction
operation
Decode
REG
REG
If REG
If REG
Q1
Q1
No
PC =
PC =
=
=
=
=
register ’f’
operation
Increment f, skip if not 0
[label]
0
d
(f) + 1
skip if not 0
None
The contents of register ’f’ are incre-
mented. If ’d’ is 0, the result is placed in
WREG. If ’d’ is 1, the result is placed
back in register ’f’.
If the result is not 0, the next instruction,
which is already fetched is discarded
and a NOP is executed instead, making
it a two-cycle instruction.
1
1(2)
HERE
ZERO
NZERO
Read
0010
Q2
Q2
No
REG
REG + 1
1;
Address (ZERO)
0;
Address (NZERO)
f
[0,1]
255
INFSNZ f,d
(dest),
INFSNZ
010d
operation
Process
Data
Q3
Q3
No
REG, 1
ffff
destination
operation
Write to
Q4
Q4
No
ffff
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
WREG
WREG
Q1
=
=
Inclusive OR Literal with WREG
[ label ]
0
(WREG) .OR. (k)
Z
The contents of WREG are OR’ed with
the eight-bit literal 'k'. The result is
placed in WREG.
1
1
IORLW
literal 'k'
Read
1011
Q2
0x9A
0xBF
k
2000 Microchip Technology Inc.
255
IORLW k
0011
0x35
Process
Data
Q3
kkkk
(WREG)
Write to
WREG
Q4
kkkk
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