Z8038018FSG Zilog, Z8038018FSG Datasheet - Page 88

• Manufacturer Part Number: Z8038018FSG
• Description: IC 16 BIT Z80 MPU 100-QFP
• Manufacturer: Zilog

Specifications of Z8038018FSG

• Processor Type: Z380
• Features: 16-Bit, High-Performance Enhanced Z80 CPU
• Speed: 18MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Processor Series: Z80380x
• Core: Z380
• Program Memory Size: 64 KB
• Maximum Clock Frequency: 18 MHz
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16-BIT INPUT AND OUTPUT GROUP (Continued)
Mnemonic
OUTDW
OTDRW
Notes:
Instructions in Italic face are Z380 new instructions, instructions with underline are Z180 original instructions.
I:
N:
(1) If the result of B-1 is zero, the Z flag is set; otherwise it is reset.
(2) Z flag is set upon instruction completion only.
I/O Instruction
IN A, (n)
IN dst,(C)
INA(W) dst,(mn)
DDIR IB INA(W) dst,(lmn)
DDIR IW INA(W) dst,(klmn)
Block Input
OUT (n),A
OUT (C),dst
OUTA(W) (mn),dst
DDIR IB OUTA(W) (lmn),dst
DDIR IW OUTA(W) (klmn),dst
Block output
ppp
000
010
111
This instruction may be used with DDIR Immediate instructions.
In Native mode, this instruction uses addresses modulo 65536.
Symbolic
Operation
BC(15-0)
(DE)
HL
BC(15-0)
(DE)
HL
Repeat until B = 0
BC
DE
HL
Reg
HL - 2
HL - 2
(HL)
(HL)
BC(15-0) - 1
BC(15-0) - 1
A31-A24
00000000
BC31-BC24
00000000
00000000
k
BBC31-BC24
00000000
BC31-BC24
00000000
00000000
k
BC31-BC24
Flags
S Z x H x V N C
•
• 1 x • x • 1 •
(1)
(2)
x • x • 1 •
P/
A23-A16
00000000
BC23-BC16
00000000
l
l
BC23-BC16
00000000
BC23-BC16
00000000
l
l
BC23-BC16
Address Bus
76 543 210
11 101 101
11 101 011
11 101 101
11 111 011
Opcode
A15-A8
Contents of A reg
BC15-BC8
m
m
m
BC15-BC8
Contents of A reg
BC15-BC8
m
m
m
BC15-BC8
HEX Bytes Time
ED
EB
ED
FB
# of
2
2
Page 88 of 125
2+r+o
2+r+o
Execute
A7-A0
n
BC7-BC0
n
n
n
BC7-BC0
n
BC7-BC0
n
n
n
BC7-BC0
Notes