Z8038018FSG Zilog, Z8038018FSG Datasheet - Page 107
Z8038018FSG
Manufacturer Part Number
Z8038018FSG
Description
IC 16 BIT Z80 MPU 100-QFP
Manufacturer
Zilog
Specifications of Z8038018FSG
Processor Type
Z380
Features
16-Bit, High-Performance Enhanced Z80 CPU
Speed
18MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
100-QFP
Processor Series
Z80380x
Core
Z380
Program Memory Size
64 KB
Maximum Clock Frequency
18 MHz
Operating Supply Voltage
0 V to 5 V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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LOW POWER STANDBY MODE
The Z380 MPU provides an optional standby mode to
minimize power consumption during system idle time. If
this option is enabled, executing the Sleep instruction
would stop clocking internal to the Z380 MPU, as well as at
the BUSCLK and IOCLK outputs. The /STNBY signal goes
to active logic 0, indicating the Z380 MPU is entering the
standby mode. All Z380 MPU operations are suspended,
the bus control signals are driven inactive and the address
bus is driven to logic 1s. Note that if an external crystal
oscillator is used to drive the Z380 MPU’s CLKI input,
/STNBY can be used to stop its operation. This is a means
Standby Mode Control and Entering
STBY (Enable Standby Mode Option). Enables the Z380
MPU to go into low power standby mode when the Sleep
instruction is executed.
BRXT (Bus Request to Exit Standby Mode). If BRXT is at
logic 1, standby mode can be exited by asserting /BREQ.
Reserved Bits 5-3. Read as 0s, should write to as 0s.
SMCR: 00000016H
R/W
7
STBY
0
BRXT
0
Figure 51. Standby Mode Control Register
0
0
0
WM2
0
0
0
1
0
WM1
0
0
1
0
0
to further reduce power dissipation for the overall system.
The standby mode can be exited by asserting any of the
/RESET, /NMI, /INT3-/INT0 (if enabled), or optionally,
/BREQ inputs.
If the standby mode option is not enabled, the Sleep
instruction is interpreted and executed no different than
the HALT instruction, stopping the Z30 MPU from further
instruction execution. In this case, /HALT goes to active
logic 0 to indicate the Z380 MPU's halt status.
WM2-WM0 (Warm-up Time Selection). WM2-WM0 deter-
mines the approximate running duration of a warm-up
counter that provides a delay before the Z380 MPU
resumes its clocking and operations, from the time an
interrupt or bus request (if so enabled) is asserted to exit
standby mode. In a system where an external crystal
oscillator is used to drive the Z380 MPU’s CLK input, an
appropriate warm-up time can be selected for the oscilla-
tor to stabilize.
WM0
0
0
1
0
0
0
Reset Value
Reserved
Bus Request to Exit Standby Mode
Enable Standby Mode Option
Warmup Time Selection
2
2
Program as 0s
Read as 0s
No Warmup
2
16
19
17
BUSCLK Cycles
BUSCLK Cycles
BUSCLK Cycles
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