Z8038018FSG Zilog, Z8038018FSG Datasheet - Page 51

• Manufacturer Part Number: Z8038018FSG
• Description: IC 16 BIT Z80 MPU 100-QFP
• Manufacturer: Zilog

Specifications of Z8038018FSG

• Processor Type: Z380
• Features: 16-Bit, High-Performance Enhanced Z80 CPU
• Speed: 18MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Processor Series: Z80380x
• Core: Z380
• Program Memory Size: 64 KB
• Maximum Clock Frequency: 18 MHz
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PS010002-0708
DATA TYPES
The Z380 CPU can operate on bits, Binary-Coded Decimal (BCD) digits (4 bits), bytes (8
bits), words (16 bits or 32 bits), byte strings, and word strings. Bits in registers can be set,
cleared, and tested. BCD digits, packed two to a byte, can be manipulated with the Deci-
mal Adjust Accumulator instruction (in conjunction with binary addition and subtraction)
and the Rotate Digit instructions. Bytes are operated on by 8-bit load, arithmetic, logical,
and shift and rotate instructions. Words are operated on in a similar manner by the word
load, arithmetic, logical, and shift and rotate instructions. Block move and search opera-
tions can manipulate byte strings and word strings up to 64 Kbytes or words long. Block I/
O instructions have identical capabilities.
CPU Registers
The Z380 CPU contains abundant register resources (Figure 33). At any given time, the
program has immediate access to both the primary and alternate registers in the selected
register set. Changing register sets is a simple matter of a LDCTL instruction.
Primary and Working Registers
The working register set is divided into the two register files; the primary file and the alter-
nate (designated by ‘) file. Each file contains an 8-bit Accumulator (A), a Flag register (F),
and six general-purpose registers (B, C, D, E, H, and L). Only one file can be active at any
given time, although data in the inactive file can still be accessed. Upon reset, the primary
register file in register set 0 is active. Exchange instructions allow the programmer to
exchange the active file with the inactive file.
The accumulator is the destination register for 8-bit arithmetic and logical operations. The
six general-purpose registers can be paired (BC, DE, and HL), and are extended to 32 bits
by the z extension to the register, to form three 32-bit general-purpose registers. The HL
register serves as the 16-bit or 32-bit accumulator for word operations.
CPU Flag Register
The Flag register contains six flags that are set or reset by various CPU operations. This
register is illustrated in Figure 36 and the various flags are described below.
S
7
Figure 36. CPU Flag Register
6
Z
X
5
4
H
X
3
P/V N
2
1
C
0
Z380 Microprocessor
Product Specification
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