CY8CTMG200-16LGXIT Cypress Semiconductor Corp, CY8CTMG200-16LGXIT Datasheet - Page 106

• Manufacturer Part Number: CY8CTMG200-16LGXIT
• Description: IC MCU 32K FLASH 16-COL
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTMG200-16LGXIT

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (32 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 13
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section D: System Resources
System Resources Register Summary
The table below lists all the registers for the system resources, in address order, within their system resource configuration.
The bits that are grayed out are reserved bits. If you write these bits, always write them with a value of ‘0’.
Summary Table of the System Resource Registers
106
1,BDh
1,D1h
1,DDh
1,E0h
1,E2h
0,C8h
0,C9h
0,CAh
0,CBh
0,CCh
0,CDh
0,CEh
0,CFh
0,D6h
0,D7h
0,D8h
x,FEh
x,FFh
1,E3h
1,E4h
0,29h
0,2Ah
0,2Bh
1,29h
0,B0h
0,B1h
0,B2h
0,B3h
0,B4h
0,B5h
0,B6h
0,B7h
0,B8h
0,58h
Address
OUT_P0
OUT_P1
OSC_CR0
OSC_CR2
I2C_XCFG
I2C_XSTAT
I2C_ADDR
I2C_BP
I2C_CP
CPU_BP
CPU_CP
I2C_BUF
I2C_CFG
I2C_SCR
I2C_DR
CPU_SCR1
CPU_SCR0
VLT_CR
VLT_CMP
SPI_TXR
SPI_RXR
SPI_CR
SPI_CFG
PT0_CFG
PT0_DATA1
PT0_DATA0
PT1_CFG
PT1_DATA1
PT1_DATA0
PT2_CFG
PT2_DATA1
PT2_DATA0
PMAx_DR
USB_MISC_C
Name
R
Bus Error
LSb First
X32ON
P0P7D
IRESS
P16D
GIES
Bit 7
Disable Buzz
Clock Sel [2:0]
P0P7EN
Overrun
PSelect
P16EN
Bit 6
PROGRAMMABLE TIMER REGISTERS (page 163)
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
DIGITAL CLOCK REGISTERS (page 112)
SYSTEM RESET REGISTERS (page 137)
I2C SLAVE REGISTERS (page 122)
POR REGISTERS (page 143)
USB REGISTERS (page 171)
Complete
SPI REGISTERS (page 147)
No Buzz
P0P4D
WDRS
Status
P14D
Bit 5
Stop
SPI
PORLEV[1:0]
Data Buffer[7:0]
CLK48MEN
Data Byte[7:0]
P0P4EN
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
TX Reg
P14EN
Stop IE
Bypass
Data[7:0]
Data[7:0]
Data[7:0]
PORS
Empty
Bit 4
ACK
Slave Address[6:0]
SLIMO[1:0]
Sleep[1:0]
NoWrite
No BC Int
RX Reg Full
LVDTBEN
Address
P12D
Sleep
Bit 3
SS_
Clock Rate[1:0]
CPU Current Pointer4:0]
I2C Current Pointer4:0]
CPU Base Pointer4:0]
I2C Base Pointer[4:0]
POR_EXT
USB_SE_
Transmit
SS_EN_
CLKSEL
CLKSEL
CLKSEL
CLKEN
P12EN
Phase
Clock
EXT-
Bit 2
EN
CPU Speed[2:0]
Buffer
Mode
USB_ON
One Shot
One Shot
One Shot
IMODIS
Polarity
Int Sel
P10D
VM[2:0]
Clock
Bit 1
LRB
LVD
Dir
HW Addr En
USB_CLK_
Slave Busy
Complete
IRAMDIS
P10EN
Enable
Enable
START
START
START
STOP
Slave
Bit 0
Byte
ON
Access
RW : 00
RW : 00
RW : 01
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW : 00
RW: 00
RW : 0
RW : 0
RW : 0
RW : 0
RW : 0
RW : 0
W : 00
R : 00
R : 00
R : 00
# : XX
R : 00
# : 00
# : 00
R : #
# : 0
R: 0
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