LPC47N227TQFP Standard Microsystems (SMSC), LPC47N227TQFP Datasheet - Page 87

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LPC47N227TQFP

Manufacturer Part Number
LPC47N227TQFP
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47N227TQFP

Lead Free Status / RoHS Status
Not Compliant

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1.
2.
The IRTX2 and TXD2 pins will be driven low whenever serial port 2 is disabled (UART2 power down bit
is cleared).
Note that bits[7,6] of CR0A can be used to override this functionality of driving the IRTX2 and TXD2
pins low when UART2 is powered down. If these bits are set to ‘11’, then the IRTX (TXD2) and IRTX2
pins are high-z.
This pin will remain low following a VCC POR until serial port 2 is enabled by setting the UART2
power down bit (CR02, bit 7), at which time the pin will reflect the state of the transmit output of
serial port 2 (if COM is enabled through CR0C Register for Serial Port 2).
This pin will remain low following a VCC POR until serial port 2 is enabled by setting the UART2
power down bit (CR02, bit 7), at which time the pin will reflect the state of the IR transmit output of
the IRCC block (if IR is enabled through the CR0C Register for Serial Port 2).
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