LPC47N227TQFP Standard Microsystems (SMSC), LPC47N227TQFP Datasheet - Page 119

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LPC47N227TQFP

Manufacturer Part Number
LPC47N227TQFP
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47N227TQFP

Lead Free Status / RoHS Status
Not Compliant

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Note
or assertion of an internal DMA request by a device in LPC47N227. The “assertion” detection logic
runs asynchronously to the PCI Clock and regardless of the Serial IRQ mode; i.e., “continuous” or
“quiet”.
Note
it.
SIRQ_CLKRUN_EN
1
2
: “Change/Assertion” means either-edge change on any internal IRQs routed to the SIRQ block
: The nCLKRUN signal is ‘1’ for at least two consecutive clocks before LPC47N227 asserts (‘0’)
0
1
KONA
FIGURE 3 – nCLKRUN SYSTEM IMPLEMENTATION EXAMPLE
INTERNAL INTERRUPTS/
CHANGE/ASSERTION
Table 47 – LPC47N227 nCLKRUN Function
DMA REQUESTS
NO CHANGE
MASTER
X
nCLKRUN
PCI CLK
119
1
TARGET
nCLKRUN
X
X
0
1
None
None
None
Assert nCLKRUN
(Central Resource)
GENERATOR
PCI CLOCK
ACTION
2

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