LPC47N227TQFP Standard Microsystems (SMSC), LPC47N227TQFP Datasheet - Page 136

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LPC47N227TQFP

Manufacturer Part Number
LPC47N227TQFP
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47N227TQFP

Lead Free Status / RoHS Status
Not Compliant

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The configuration of the LPC47N227 is programmed through hardware selectable Configuration
Access Ports that appear when the chip is placed into the configuration state. The LPC47N227 logical
device blocks, if enabled, will operate normally in the configuration state.
Configuration Access Ports
The Configuration Access Ports are the CONFIG PORT, the INDEX PORT, and the DATA PORT
(Table 54). The base address of these registers is controlled by the GP11/SYSOPT pin and by the
Configuration Port Base Address registers CR12 and CR13. To determine the configuration base
address at power-up, the state of the GP11/SYSOPT pin is latched by the falling edge of a hardware
reset. If the latched state is a 0, the base address of the Configuration Access Ports is located at
address 0x02E; if the latched state is a 1, the base address is located at address 0x04E. The base
address is relocatable via CR12 and CR13.
Note
Note
Configuration State
The configuration registers are used to select programmable chip options. The LPC47N227 operates
in two possible states: the run state and the configuration state. After power up by default the chip is in
the run state.
enabled. Programming the configuration registers typically follows this sequence:
1.
2.
3.
Entering the Configuration State
To enter the configuration state write the Configuration Access Key to the CONFIG PORT. The
Configuration Access Key is one byte of 55H data. The LPC47N227 will automatically activate the
Configuration Access Ports following this procedure.
Configuration Register Programming
The LPC47N227 contains configuration
configuration state, configuration registers can be programmed by first writing the register index
number (00 - 39H) to the Configuration Select Register (CSR) through the INDEX PORT and then
writing or reading the configuration register contents through the DATA PORT. Configuration register
access remains enabled until the configuration state is explicitly exited.
CONFIG PORT
INDEX PORT
DATA PORT
Enter the Configuration State,
Program the Configuration Register(s),
Exit the Configuration State.
1
2
:
:
PORT NAME
The INDEX and DATA ports are active only when the LPC47N227 is in the configuration state.
The INDEX PORT is only readable in the configuration state.
To program the configuration registers, the configuration state must be explicitly
Table 54 – Configuration Access Ports
SYSOPT = 0
0x02E
0x02E
CONFIGURATION
registers CR00-CR39. After the LPC47N227 enters the
INDEX PORT + 1
136
SYSOPT = 1
0x04E
0x04E
WRITE
READ/WRITE
READ/WRITE
TYPE
1,2
1

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