LPC47N227TQFP Standard Microsystems (SMSC), LPC47N227TQFP Datasheet - Page 131

• Manufacturer Part Number: LPC47N227TQFP
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47N227TQFP

• Lead Free Status / RoHS Status: Not Compliant

NAME/DEFAULT
PME_STS2
Default = 0x00
PME_STS3
Default = 0x00
on VTR POR
on VTR POR
REGISTER
OFFSET
(R/W)
(R/W)
03
04
PME Wake Status Register 2
This register indicates the state of the individual PME
wake sources, independent of the individual source
enables or the PME_En bit.
If the wake source has asserted a wake event, the
associated PME Wake Status bit will be a “1”.
Bit[0] RI1
Bit[1] RI2
Bit[2] GP20
Bit[3] GP21
Bit[4] GP22
Bit[5] GP23
Bit[6] GP24
Bit[7] Reserved
The PME Wake Status register is not affected by Vcc
POR, SOFT RESET or HARD RESET.
Writing a “1” to Bit[7:0] will clear it. Writing a “0” to any
bit in PME Wake Status Register has no effect.
PME Wake Status Register 3
This register indicates the state of the individual PME
wake sources, independent of the individual source
enables or the PME_En bit.
If the wake source has asserted a wake event, the
associated PME Wake Status bit will be a “1”.
Bit[0] GP30
Bit[1] GP31
Bit[2] GP32
Bit[3] GP33
Bit[4] GP34
Bit[5] GP35
Bit[6] GP36
Bit[7] GP37
The PME Wake Status register is not affected by Vcc
POR, SOFT RESET or HARD RESET.
Writing a “1” to Bit[7:0] will clear it. Writing a “0” to any
bit in PME Wake Status Register has no effect.
131
DESCRIPTION