LPC47N227TQFP Standard Microsystems (SMSC), LPC47N227TQFP Datasheet - Page 188

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LPC47N227TQFP

Manufacturer Part Number
LPC47N227TQFP
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47N227TQFP

Lead Free Status / RoHS Status
Not Compliant

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Note 1: Maximum value only applies if there is data in the FIFO waiting to be written out.
Note 2: BUSY is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
NAME
t1
t2
t3
t4
t5
t6
t7
t8
nSTROBE
PD<7:0>
BUSY
nALF
nALF Valid to nSTROBE Asserted
PDATA Valid to nSTROBE Asserted
BUSY Deasserted to nALF Changed
(Notes 1,2)
BUSY Deasserted to PDATA Changed (Notes 1,2)
nSTROBE Asserted to Busy Asserted
nSTROBE Deasserted to Busy Deasserted
BUSY Deasserted to nSTROBE Asserted (Notes 1,2)
BUSY Asserted to nSTROBE Deasserted (Note 2)
FIGURE 23 - ECP PARALLEL PORT FORWARD TIMING
DESCRIPTION
t6
t2
t1
t7
188
t5
t8
MIN
80
80
80
80
t6
0
0
0
0
TYP
t3
t4
MAX
180
180
200
180
60
60
UNITS
ns
ns
ns
ns
ns
ns
ns
ns

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