D13002F16V Renesas Electronics America, D13002F16V Datasheet - Page 531

• Manufacturer Part Number: D13002F16V
• Description: IC H8/3002 ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13002F16V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

17.4 Software Standby Mode
17.4.1 Transition to Software Standby Mode
To enter software standby mode, execute the SLEEP instruction while the SSBY bit is set to 1 in
SYSCR.
In software standby mode, current dissipation is reduced to an extremely low level because the
CPU, clock, and on-chip supporting modules all halt. The DMAC and on-chip supporting
modules are reset. As long as the specified voltage is supplied, however, CPU register contents
and on-chip RAM data are retained. The settings of the I/O ports and refresh controller* are also
held.
Note: * RTCNT and bits 7 and 6 of RTMCSR are initialized. Other bits and registers hold their
17.4.2 Exit from Software Standby Mode
Software standby mode can be exited by input of an external interrupt at the NMI, IRQ
IRQ
Exit by Interrupt: When an NMI, IRQ
clock oscillator begins operating. After the oscillator settling time selected by bits STS2 to STS0
in SYSCR, stable clock signals are supplied to the entire H8/3002 chip, software standby mode
ends, and interrupt exception handling begins. Software standby mode is not exited if the interrupt
enable bits of interrupts IRQ
in the CPU.
Exit by RES Input: When the RES input goes low, the clock oscillator starts and clock pulses are
supplied immediately to the entire H8/3002 chip. The RES signal must be held low long enough
for the clock oscillator to stabilize. When RES goes high, the CPU starts reset exception handling.
Exit by STBY Input: Low input at the STBY pin causes a transition to hardware standby mode.
2
pin, or by input at the RES or STBY pin.
previous states.
0
, IRQ
1
, and IRQ
0
, IRQ
2
1
, or IRQ
are cleared to 0, or if these interrupts are masked
517
2
interrupt request signal is received, the
0
, IRQ
1
, or