D13002F16V Renesas Electronics America, D13002F16V Datasheet - Page 194

IC H8/3002 ROMLESS 100QFP

D13002F16V

Manufacturer Part Number
D13002F16V
Description
IC H8/3002 ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of D13002F16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D13002F16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
ø
BREQ
BACK
Address
bus
Strobe
If a bus cycle is prolonged by insertion of wait states, the first refresh request is held, as in the
bus-released state.
If contention occurs between a transition to software standby mode and a bus request from an
external bus master, the bus may be released for one state just before the transition to
software standby mode (see figure 7-25). When using software standby mode, clear the
BRLE bit to 0 in BRCR before executing the SLEEP instruction.
If similar contention occurs in a transition to self-refresh mode, strobe waveforms may not be
output correctly. This can also be prevented by clearing the BRLE bit to 0 in BRCR.
Figure 7-25 Contention between Bus-Released State and Software Standby Mode
Bus-released state
177
Software standby mode

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