D13002F16V Renesas Electronics America, D13002F16V Datasheet - Page 179

• Manufacturer Part Number: D13002F16V
• Description: IC H8/3002 ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13002F16V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Example 4: Connection to Two 4-Mbit DRAM Chips (16-Mbyte Mode): Figure 7-13 shows
an example of interconnections to two 2CAS 4-Mbit DRAM chips, and the corresponding address
map. Up to four DRAM chips can be connected to area 3 by decoding upper address bits A
and A
Figure 7-14 shows a setup procedure to be followed by a program for this example. The DRAM
in this example has 9-bit row addresses and 9-bit column addresses. Both chips must be refreshed
simultaneously, so the RFSH pin must be used.
Figure 7-13 Interconnections and Address Map for Multiple 2CAS 4-Mbit DRAM Chips
20
.
H8/3002
H'600000
H'67FFFF
H'680000
H'6FFFFF
H'700000
H'7FFFFF
D
A to A
15
9
RFSH
HWR
to D
LWR
CS
A
RD
19
1
3
0
DRAM area
DRAM area
Not used
No. 1
No. 2
a. Interconnections (example)
b. Address map
(Example)
162
Area 3 (16-Mbyte mode)
2
row address, 9-bit column
address, and
CAS
A to A
RAS
UCAS
LCAS
WE
OE
I/O
A to A
RAS
UCAS
LCAS
WE
OE
I/O
8
8
15
15
4-Mbit DRAM with 9-bit
to I/O
to I/O
0
0
0
0
16-bit organization
No. 1
No. 2
19