EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 31

• Manufacturer Part Number: EVAL-ADUC832QSZ
• Description: KIT DEV FOR ADUC832 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC832QSZ

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC832
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: EVAL-ADUC832QS; EVAL-ADUC832QS

ADuC832 Configuration SFR (CFG832)
The CFG832 SFR contains the necessary bits to configure the
internal XRAM, External Clock select, PWM output selection,
DAC buffer, and the extended SP. By default it configures the
user into 8051 mode, i.e., extended SP is disabled, internal
XRAM is disabled.
CFG832
SFR Address
Power-On Default Value
Bit Addressable
REV. 0
Bit
7
6
5
4
3
2
1
0
Name
EXSP
PWPO
DBUF
EXTCLK
RSVD
RSVD
RSVD
XRAMEN
Description
Extended SP Enable .
When set to “1” by the user, the stack will roll over from SPH/SP = 00FFH to 0100H.
When set to “0” by the user, the stack will roll over from SP = FFH to SP = 00H.
PWM pin out selection
Set to “1” by the user = PWM output pins selected as P3.4 and P3.3.
Set to “0” by the user = PWM output pins selected as P2.6 and P2.7.
DAC Output Buffer
Set to “1” by the user = DAC
Set to “0” by the user = DAC Output Buffer Enabled.
Set by the user to “1” to select an external clock input on P3.4.
Set by the user to “0” to use the internal PLL clock.
Reserved – This bit should always contain 0.
Reserved – This bit should always contain 0.
Reserved – This bit should always contain 0.
XRAM Enable Bit
When set to “1” by the user, the internal XRAM will be mapped into the lower 2 kBytes of the external
address space.
When set to “0” by the user, the internal XRAM will not be accessible and the external data memory
will be mapped into the lower 2 kBytes of external data memory.
ADuC832 Config SFR
No
AFH
00H
Table VIII. CFG832 SFR Bit Designations
.
Output Buffer Bypassed.
–31–
ADuC832