EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 29

• Manufacturer Part Number: EVAL-ADUC832QSZ
• Description: KIT DEV FOR ADUC832 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC832QSZ

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC832
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: EVAL-ADUC832QS; EVAL-ADUC832QS

USING THE FLASH/EE DATA MEMORY
The 4 kBytes of Flash/EE data memory is configured as 1024
pages, each of four bytes. As with the other ADuC832 peripherals,
the interface to this memory space is via a group of registers
mapped in the SFR space. A group of four data registers
(EDATA1–4) are used to hold the four bytes of data at each
page. The page is addressed via the two registers EADRH and
EADRL. Finally, ECON is an 8-bit control register that may be
written with one of nine Flash/EE memory access commands to
trigger various read, write, erase, and verify functions.
A block diagram of the SFR interface to the Flash/EE data
memory array is shown in Figure 20.
ECON—Flash/EE Memory Control SFR
Programming of either the Flash/EE data memory or the Flash/EE
program memory is done through the Flash/EE memory control
SFR (ECON). This SFR allows the user to read, write, erase, or
verify the 4 kBytes of Flash/EE data memory or the 56 kBytes
of Flash/EE program memory.
ECON VALUE
01H
READ
02H
WRITE
03H
04H
VERIFY
05H
ERASE PAGE
06H
ERASE ALL
81H
READBYTE
82H
WRITEBYTE
0FH
EXULOAD
F0H
ULOAD
REV. 0
Results in four bytes in the Flash/EE data memory, addressed Not Implemented. Use the MOVC instruction.
Results in four bytes in EDATA1–4 being written to
the Flash/EE data memory at the page address given
Reserved Command
Verifies if the data in EDATA1–4 is contained in the page
address given by EADRH/L. A subsequent read of the
Results in the byte in the Flash/EE data memory, addressed
by the byte address EADRH/L, being read into EDATA1
Results in the byte in EDATA1 being written into
Flash/EE data memory, at the byte address EADRH/L.
data memory.
COMMAND DESCRIPTION
(NORMAL MODE) (Power-On Default)
by the page address EADRH/L, being read into EDATA 1 to 4.
by EADRH/L (0 ≤ EADRH / L < 0400H).
Note: The four bytes in the page being addressed must
be pre-erased.
ECON SFR will result in a 0 being read if the verification is valid,
or a nonzero value being read to indicate an invalid verification.
Results in the Erase of the 4-byte page of Flash/EE data
memory addressed by the page address EADRH/L.
Results in the erase of entire 4 kBytes of Flash/EE
data memory.
(0 ≤ EADRH / L ≤ 0FFFH).
Leaves the ECON instructions to operate on the Flash/EE
Enters ULOAD mode, directing subsequent ECON
instructions to operate on the Flash/EE program memory.
Table VII. ECON—Flash/EE Memory Commands
–29–
Figure 20. Flash/EE Data Memory Control and Configuration
ARE GIVEN IN
ADDRESSES
BRACKETS
BYTE
3FEH
3FFH
03H
02H
01H
00H
COMMAND DESCRIPTION
(ULOAD MODE)
Results in bytes 0–255 of internal XRAM being written
to the 256 bytes of Flash/EE program memory at the
page address given by EADRH (0 ≤ EADRH < E0H).
Note: The 256 bytes in the page being addressed
must be pre-erased.
Reserved Command
Not Implemented. Use the MOVC and MOVX
Instructions to verify the WRITE in software.
Results in the 64-byte page of Flash/EE program memory,
addressed by the byte address EADRH/L being erased.
EADRL can equal any of 64 locations within the page.
A new page starts whenever EADRL is equal to 00H,
40H, 80H, or C0H.
Results in the Erase of the entire 56 kBytes of ULOAD
Flash/EE program memory.
Not Implemented. Use the MOVC command.
Results in the byte in EDATA1 being written into
Flash/EE program memory, at the byte address
EADRH/L (0 ≤ EADRH / L ≤ DFFFH).
Enters NORMAL mode directing subsequent ECON
instructions to operate on the Flash/EE data memory.
Leaves the ECON instructions to operate on the
Flash/EE program memory.
(0FFCH)
(0FF8H)
(000CH)
(0008H)
(0004H)
BYTE 1
BYTE 1
BYTE 1
BYTE 1
(0000H)
BYTE 1
BYTE 1
(0FFDH)
(000DH)
BYTE 2
(0009H)
(0005H)
(0001H)
BYTE 2
(0FF9H)
BYTE 2
BYTE 2
BYTE 2
BYTE 2
(0FFAH)
(0FFEH)
(000EH)
(000AH)
(0006H)
BYTE 3
BYTE 3
BYTE 3
BYTE 3
BYTE 3
(0002H)
BYTE 3
ADuC832
(0FFFH)
(000BH)
BYTE 4
(0FFBH)
(000FH)
(0007H)
(0003H)
BYTE 4
BYTE 4
BYTE 4
BYTE 4
BYTE 4