EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 18

KIT DEV FOR ADUC832 QUICK START

EVAL-ADUC832QSZ

Manufacturer Part Number
EVAL-ADUC832QSZ
Description
KIT DEV FOR ADUC832 QUICK START
Manufacturer
Analog Devices Inc
Series
QuickStart™ Kitr
Type
MCUr
Datasheets

Specifications of EVAL-ADUC832QSZ

Contents
Evaluation Board, Cable, Power Supply, Software and Documentation
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADuC832
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
EVAL-ADUC832QS
EVAL-ADUC832QS
ADuC832
ADC CIRCUIT INFORMATION
General Overview
The ADC conversion block incorporates a fast, 8-channel,
12-bit, single-supply ADC. This block provides the user with
multichannel mux, track/hold, on-chip reference, calibration
features, and ADC. All components in this block are easily
configured via a 3-register SFR interface.
The ADC converter consists of a conventional successive-
approximation converter based around a capacitor DAC. The
converter accepts an analog input range of 0 to V
precision, low drift, and factory calibrated 2.5 V reference is
provided on-chip. An external reference can be connected as
described later. This external reference can be in the range 1 V
to AV
Single step or continuous conversion modes can be initiated in
software or alternatively by applying a convert signal to an
external pin. Timer 2 can also be configured to generate a repeti-
tive trigger for ADC conversions. The ADC may be configured
to operate in a DMA mode whereby the ADC block continu-
ously converts and captures samples to an external RAM space
without any interaction from the MCU core. This automatic
capture facility can extend through a 16 MByte external data
memory space.
The ADuC832 is shipped with factory programmed calibration
coefficients that are automatically downloaded to the ADC on
power-up, ensuring optimum ADC performance. The ADC
core contains internal offset and gain calibration registers that
can be hardware calibrated to minimize system errors.
A voltage output from an on-chip band gap reference propor-
tional to absolute temperature can also be routed through the
front end ADC multiplexer (effectively a ninth ADC channel
input) facilitating a temperature sensor implementation.
DD
.
REF
. A high
–18–
ADC Transfer Function
The analog input range for the ADC is 0 V to V
range, the designed code transitions occur midway between
successive integer LSB values (i.e., 1/2 LSB, 3/2 LSBs,
5/2 LSBs . . . FS –3/2 LSBs). The output coding is straight
binary with 1 LSB = FS/4096 or 2.5 V/4096 = 0.61 mV when
V
the 0 to V
Typical Operation
Once configured via the ADCCON 1-3 SFRs, the ADC will con-
vert the analog input and provide an ADC 12-bit result word in the
ADCDATAH/L SFRs. The top four bits of the ADCDATAH
SFR will be written with the channel selection bits so as to
identify the channel result. The format of the ADC 12-bit result
word is shown in Figure 8.
REF
TOP 4 BITS
= 2.5 V. The ideal input/output transfer characteristic for
CH–ID
111...111
111...110
111...101
111...100
000...011
000...010
000...001
000...000
OUTPUT
REF
CODE
range is shown in Figure 7.
Figure 7. ADC Transfer Function
0V 1LSB
Figure 8. ADC Result Format
1LSB =
4096
FS
VOLTAGE INPUT
LOW 8 BITS OF THE
ADC RESULT WORD
HIGH 4 BITS OF
ADC RESULT WORD
ADCDATAH SFR
ADCDATAL SFR
–1LSB
+FS
REF
. For this
REV. 0

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