EVAL-ADUC832QSZ Analog Devices Inc, EVAL-ADUC832QSZ Datasheet - Page 26

• Manufacturer Part Number: EVAL-ADUC832QSZ
• Description: KIT DEV FOR ADUC832 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC832QSZ

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC832
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: EVAL-ADUC832QS; EVAL-ADUC832QS

ADuC832
INITIATING CALIBRATION IN CODE
When calibrating the ADC using ADCCON1, the ADC should
be set up into the configuration in which it will be used. The
ADCCON3 register can then be used to set up the device up
and calibrate the ADC offset and gain.
MOV ADCCON1,#0ACH
To calibrate device offset:
MOV ADCCON2,#0BH
MOV ADCCON3,#25H
To calibrate device gain:
MOV ADCCON2,#0CH
MOV ADCCON3,#27H
To calibrate system offset:
Connect system AGND to an ADC channel input (0).
MOV ADCCON2,#00H
MOV ADCCON3,#25H
;ADC on; ADCCLK set
;to divide by 16,4
;acquisition clock
;select internal AGND
;select offset calibration,
;31 averages per bit,
;offset calibration
;select internal V
;select offset calibration,
;31 averages per bit,
;offset calibration
;select external AGND
;select offset calibration,
;31 averages per bit
REF
–26–
To calibrate system gain:
Connect system V
MOV ADCCON2,#01H
MOV ADCCON3,#27H
The calibration cycle time T
following equation:
For an ADCCLK/F
NUMAV = 15, the calibration cycle time is:
In a calibration cycle, the ADC busy flag (Bit 7), instead of
framing an individual ADC conversion as in normal mode, will
go high at the start of calibration and only return to zero at the
end of the calibration cycle. It can therefore be monitored in
code to indicate when the calibration cycle is completed. The
following code can be used to monitor the BUSY signal during
a calibration cycle:
WAIT:
MOV A, ADCCON3
JB ACC.7, WAIT
T
CAL
T
T
CAL
CAL
=
14
=
=
14
4 2
×
REF
.
CORE
ADCCLK
×
ms
to an ADC channel input (1).
( /
1 1048576
divide ratio of 16, a T
;select external V
;select offset calibration,
;31 averages per bit,
;offset calibration
WAIT else continue
;move ADCCON3 to A
;If Bit 7 is set jump to
CAL
×
is calculated by the
NUMAV
)
×
15
×
×
ACQ
(
16
(
16 4
= 4 ADCCLK,
+
REF
+
T
ACQ
)
REV. 0
)