MT46H8M32LFB5-6:A TR Micron Technology Inc, MT46H8M32LFB5-6:A TR Datasheet - Page 39

• Manufacturer Part Number: MT46H8M32LFB5-6:A TR
• Description: IC DDR SDRAM 256MBIT 90VFBGA
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H8M32LFB5-6:A TR

• Format - Memory: RAM
• Memory Type: Mobile DDR SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 166MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 90-VFBGA
• Organization: 8Mx32
• Density: 256Mb
• Address Bus: 14b
• Access Time (max): 6.5/5ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 120mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1280-2; MT46H8M32LFB5-6:A TR

Figure 23:
Figure 24:
PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 6/08 EN
t
t
DQSS (NOM)
DQSS (NOM)
Command
Command
Consecutive WRITE-to-WRITE
Nonconsecutive WRITE-to-WRITE
Address
Address
DQS
DQS
CK#
CK#
DM
Notes:
DM
Notes:
DQ
DQ
CK
CK
1. D
2. An uninterrupted burst of 4 is shown.
3. Each WRITE command may be to any bank.
1. D
2. An uninterrupted burst of 4 is shown.
3. Each WRITE command may be to any bank.
WRITE
WRITE
Bank,
Bank,
Col b
Col b
T0
T0
IN
IN
b (n) = data-in for column b (n).
b (n) = data-in for column b (n).
t
t
DQSS
DQSS
NOP
NOP
D
D
T1
T1
b
b
IN
IN
T1n
T1n
b+1
b+1
D
D
IN
IN
WRITE
Bank,
b+2
Col n
b+2
NOP
D
D
T2
T2
IN
IN
39
T2n
T2n
b+3
b+3
D
D
IN
IN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x16, x32 Mobile DDR SDRAM
WRITE
Bank,
Col n
NOP
T3
T3
D
n
Transitioning data
IN
Transitioning data
T3n
n+1
D
IN
n+2
D
D
T4
NOP
T4
NOP
n
IN
IN
T4n
T4n
n+1
D
n+3
D
IN
IN
©2005 Micron Technology, Inc. All rights reserved.
n+2
D
T5
T5
NOP
NOP
Don’t Care
Don’t Care
IN
T5n
Operations
n+3
D
IN