W971GG6JB-25 Winbond Electronics, W971GG6JB-25 Datasheet - Page 3

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W971GG6JB-25

Manufacturer Part Number
W971GG6JB-25
Description
IC DDR2-800 SDRAM 1GB 84-WBGA
Manufacturer
Winbond Electronics
Datasheet

Specifications of W971GG6JB-25

Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
1G (64M x 16)
Speed
2.5ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-WBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q5804012

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Part Number
Manufacturer
Quantity
Price
Part Number:
W971GG6JB-25
Manufacturer:
Winbond
Quantity:
9 560
Part Number:
W971GG6JB-25
Manufacturer:
WINBOND/华邦
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W971GG6JB-25
0
Part Number:
W971GG6JB-25I
Manufacturer:
SIEMENS
Quantity:
24
11.
12.
10.12
10.13
10.14
10.15
10.16
10.17
10.18
10.19
10.20
10.21
10.22
10.23
10.24
(AL=2, CL=3, internal tRCD=3, BL=4, tRTP ≤ 2clks) ....................................................................................... 81
10.25
(AL=2, CL=3, internal tRCD=3, BL=4, tRTP ≤ 2clks) ....................................................................................... 82
10.26
10.27
10.28
10.29
10.30
10.31
Package Outline WBGA-84 (8x12.5 mm
PACKAGE SPECIFICATION .............................................................................................................. 86
REVISION HISTORY .......................................................................................................................... 87
Burst read interrupt timing: RL =3 (CL=3, AL=0, BL=8) ............................................................. 75
Burst write interrupt timing: RL=3 (CL=3, AL=0, WL=2, BL=8) .................................................. 75
Write operation with Data Mask: WL=3, AL=0, BL=4) ............................................................... 76
Burst read operation followed by precharge: RL=4 (AL=1, CL=3, BL=4, tRTP ≤ 2clks) ............ 77
Burst read operation followed by precharge: RL=4 (AL=1, CL=3, BL=8, tRTP ≤ 2clks) ............ 77
Burst read operation followed by precharge: RL=5 (AL=2, CL=3, BL=4, tRTP ≤ 2clks) ............ 78
Burst read operation followed by precharge: RL=6 (AL=2, CL=4, BL=4, tRTP ≤ 2clks) ............ 78
Burst read operation followed by precharge: RL=4 (AL=0, CL=4, BL=8, tRTP > 2clks) ............ 79
Burst write operation followed by precharge: WL = (RL-1) = 3 .................................................. 79
Burst write operation followed by precharge: WL = (RL-1) = 4 .................................................. 80
Burst read operation with Auto-precharge: RL=4 (AL=1, CL=3, BL=8, tRTP ≤ 2clks) ............... 80
Burst read operation with Auto-precharge: RL=4 (AL=1, CL=3, BL=4, tRTP > 2clks) ............... 81
Burst read with Auto-precharge followed by an activation to the same bank (tRC Limit): RL=5
Burst read with Auto-precharge followed by an activation to the same bank (tRP Limit): RL=5
Burst write with Auto-precharge (tRC Limit): WL=2, WR=2, BL=4, tRP=3 ................................. 82
Burst write with Auto-precharge (WR + tRP Limit): WL=4, WR=2, BL=4, tRP=3 ....................... 83
Self Refresh Timing ................................................................................................................... 83
Active Power Down Mode Entry and Exit Timing ....................................................................... 84
Precharged Power Down Mode Entry and Exit Timing .............................................................. 84
Clock frequency change in precharge Power Down mode ........................................................ 85
2
) ....................................................................................................... 86
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Publication Release Date: Mar. 28, 2011
W971GG6JB
Revision A07

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