W971GG6JB-25 Winbond Electronics, W971GG6JB-25 Datasheet - Page 13

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W971GG6JB-25

Manufacturer Part Number
W971GG6JB-25
Description
IC DDR2-800 SDRAM 1GB 84-WBGA
Manufacturer
Winbond Electronics
Datasheet

Specifications of W971GG6JB-25

Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
1G (64M x 16)
Speed
2.5ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-WBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q5804012

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7.2.2.3
( CS = "L", RAS = "L", CAS = "L", WE = "L", BA0 = "L", BA1 = "H", BA2 = "L" A0 to A12 =
Register data)
The extended mode register (2) controls refresh related features. The default value of the extended
mode register (2) is not defined, therefore the extended mode register (2) must be programmed during
initialization for proper operation.
The DDR2 SDRAM should be in all bank precharge state with CKE already high prior to writing into
the extended mode register (2). The mode register set command cycle time (t
complete the write operation to the extended mode register (2). Mode register contents can be
changed using the same command and clock cycle requirements during normal operation as long as
all banks are in the precharge state.
Notes:
1. The rest bits in EMR (2) is reserved for future use and all bits in EMR (2) except A7, BA0, BA1 and BA2 must be programmed
2. When DRAM is operated at 85°C < T
to 0 when setting the extended mode register (2) during initialization.
before the Self Refresh mode can be entered.
BA2
0*
1
BA1 BA0 A12
BA1 BA0
1
0
0
1
1
Extend Mode Register Set Command (2), EMR (2)
0
1
0
1
0
MRS mode
EMR (1)
EMR (2)
EMR (3)
MRS
A11
A10
0*
1
CASE
A9
≤ 95°C the extended Self Refresh rate must be enabled by setting bit A7 to "1"
A8
Figure 4 – EMR (2)
SELF
A7
A7
0
1
High Temperature Self Refresh Rate Enable
A6
- 13 -
A5
A4
Enable*
Disable
0*
A3
Publication Release Date: Mar. 28, 2011
2
1
A2
A1
MRD
W971GG6JB
A0
) must be satisfied to
Extended Mode Register (2)
Address Field
Revision A07

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