LPC11A14FBD48/301, NXP Semiconductors, LPC11A14FBD48/301, Datasheet - Page 39

• Manufacturer Part Number: LPC11A14FBD48/301,
• Description: ARM Microcontrollers - MCU CortexM0 32bit 32KB
• Manufacturer: NXP Semiconductors

Specifications of LPC11A14FBD48/301,

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC11A
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.6 V to 3.6 V
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 250

NXP Semiconductors
LPC11AXX
Product data sheet
7.23.7 External interrupt inputs
7.24 Emulation and debugging
All GPIO pins can be level or edge sensitive interrupt inputs.
Debug functions are integrated into the ARM Cortex-M0. JTAG and Serial Wire Debug
(SWD) with four breakpoints and two watchpoints are supported.
The RESET pin selects between the JTAG boundary scan (RESET = LOW) and the ARM
SWD debug (RESET = HIGH). The ARM SWD debug port is disabled while the
LPC11Axx is in reset.
To perform boundary scan testing, follow these steps:
Remark: The JTAG interface cannot be used for debug purposes.
On the WLCSP package, the TCK signal is shared with the VDDCMP input on pin
PIO0_5. To perform a boundary scan on a blank device, make sure that the PIO0_5 pin is
not filtered on the board. The bypass filter usually added to the comparator voltage
reference input (VDDCMP) filters out the SWCLK/TCK input signal.
For SWD debug, an alternative TCK/SWCLK clock pin is available on pin PIO0_2. This is
the default function after booting for the WLCSP package.
1. Erase any user code residing in flash.
2. Power up the part with the RESET pin pulled HIGH externally.
3. Wait for at least 250 s.
4. Pull the RESET pin LOW externally.
5. Perform boundary scan operations.
6. Once the boundary scan operations are completed, assert the TRST pin to enable the
SWD debug mode and release the RESET pin (pull HIGH).
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 30 October 2012
32-bit ARM Cortex-M0 microcontroller
LPC11Axx
© NXP B.V. 2012. All rights reserved.
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