LPC11A14FBD48/301, NXP Semiconductors, LPC11A14FBD48/301, Datasheet - Page 14

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LPC11A14FBD48/301,

Manufacturer Part Number
LPC11A14FBD48/301,
Description
ARM Microcontrollers - MCU CortexM0 32bit 32KB
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC11A14FBD48/301,

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC11A
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
2.6 V to 3.6 V
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Factory Pack Quantity
250

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC11A14FBD48/301,
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 4.
LPC11AXX
Product data sheet
Symbol
PIO0_3/SDA/ACMP_O/
SWDIO/CT16B1_CAP0
PIO0_4/R/AOUT/
CT16B0_MAT1/MOSI0
TCK/SWCLK/PIO0_5/
R/CT16B0_MAT2/
SCK0
TCK/SWCLK/PIO0_5/
VDDCMP/
CT16B0_MAT2/
SCK0
LPC11Axx pin description table
Pin/Ball
16 11
28 18 A4
29 19 -
-
-
B1
B3
[4][6]
[7]
[9]
[7][8]
All information provided in this document is subject to legal disclaimers.
Type Reset
I/O
I/O
O
I/O
I
I/O
-
O
O
I/O
I
I/O
-
O
I/O
I
I/O
I
O
I/O
Rev. 4 — 30 October 2012
state
[1]
I; IA
-
-
-
-
I; PU
-
-
-
-
I; PU
-
-
-
-
I; PU
-
-
-
-
Description
PIO0_3 — General purpose digital input/output pin.
High-current sink (20 mA) or standard-current sink (4 mA)
programmable; true open-drain for all pin functions. Input
glitch filter (50 ns) capable.
SDA — I
glitch filter (50 ns) capable.
ACMP_O — Analog comparator output.
SWDIO — Serial Wire Debug I/O (secondary for LQFP and
HVQFN packages). Input glitch filter (50 ns) capable. For the
WLCSP20 package only, this pin is configured to the SWDIO
function by the boot loader after reset.
CT16B1_CAP0 — Capture input 0 for 16-bit timer 1. Input
glitch filter (50 ns) capable.
PIO0_4 — General purpose digital input/output pin. Input
glitch filter (10 ns) capable.
R — Reserved.
AOUT — D/A converter output.
CT16B0_MAT1 — Match output 1 for 16-bit timer 0.
MOSI0 — Master Out Slave In for SSP0. Input glitch filter
(10 ns) capable.
TCK/SWCLK — Test clock TCK for JTAG interface and
primary (default) Serial Wire Debug Clock. Input glitch filter (10
ns) capable.
PIO0_5 — General purpose digital input/output pin. Input
glitch filter (10 ns) capable.
R — Reserved.
CT16B0_MAT2 — Match output 2 for 16-bit timer 0.
SCK0 — Serial clock for SSP0. Input glitch filter (10 ns)
capable.
TCK/SWCLK — Test clock TCK for JTAG interface and
secondary Serial Wire Debug ClocK. Use PIO0_2 for the
default TCK/SWCLK function. Input glitch filter (10 ns)
capable.
PIO0_5 — General purpose digital input/output pin. Input
glitch filter (10 ns) capable.
VDDCMP — Analog comparator alternate reference voltage.
CT16B0_MAT2 — Match output 2 for 16-bit timer 0.
SCK0 — Serial clock for SSP0. Input glitch filter (10 ns)
capable.
2
C-bus data (true open-drain) input/output. Input
32-bit ARM Cortex-M0 microcontroller
LPC11Axx
© NXP B.V. 2012. All rights reserved.
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