OR3T125-5BA352 AGERE [Agere Systems], OR3T125-5BA352 Datasheet - Page 117

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OR3T125-5BA352

Manufacturer Part Number
OR3T125-5BA352
Description
3C and 3T Field-Programmable Gate Arrays
Manufacturer
AGERE [Agere Systems]
Datasheet
Data Sheet
June 1999
Lucent Technologies Inc.
Timing Characteristics
MPI_RW (RD/WR)
MPI_RW (RD/WR)
MPI_STRB (TS)
MPI_STRB (TS)
MPI_ACK (TA)
MPI_ACK (TA)
MPI_BI (BI)
MPI_BI (BI)
URDWRN
URDWRN
CS0, CS1
CS0, CS1
MPI_CLK
MPI_CLK
USTART
USTART
UA[3:0]
UA[3:0]
UEND
UEND
A[4:0]
D[7:0]
D[7:0]
A[4:0]
Figure 68. MPI PowerPC User Space Write Timing
Figure 67. MPI PowerPC User Space Read Timing
(continued)
URDWR_DEL
UA_DEL
UA_DEL
CS_SET
RW_SET
A_SET
CS_SET
RW_SET
A_SET
WD_SET
USER LOGIC DELAY
USER LOGIC DELAY
USTART_DEL
USTART_DEL
URDWR_DEL
UEND_SET
UEND_SET
RDA_DEL
TA_DEL
TA_DEL
BI_DEL
BI_DEL
RW_HLD
RDS_HLD
RDS_SET
WD_HLD
RW_HLD
A_HLD
CS_HLD
CS_HLD
A_HLD
TA_DELZ
TA_DELZ
ORCA Series 3C and 3T FPGAs
USTARTCLR_DEL
TA_DEL
USTARTCLR_DEL
TA_DEL
BI_DEL
BI_DEL
BI_DELZ
BI_DELZ
RDA_HLD
UEND_DEL
UEND_DEL
5-5832(F)
5-5840(F)
117

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