MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 18

• Manufacturer Part Number: MT90520AG
• Description: 8-Port Primary Rate Circuit Emulation AAL1 SAR
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

2.11.3
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2.11.4
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2.11.5
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Per-VC Transmitted Cell Counter.
Within each VC’s UDT Reassembly Control Structure, there is a bit (V = VC Arrival) which is set each time
that a cell arrives on the VC. CPU monitoring of this bit can be used to provide per-VC timeout monitoring.
In addition to the counters themselves, if one of the following per-VC counters rolls over and the
corresponding service enable bit for the counter is set, a status field indicates the number of the TDM port
associated with the last UDT Reassembly Control Structure to generate a serviceable event.
Overall UDT Cell Counter
Within each VC’s SDT Reassembly Control Structure, there is a bit (V = VC Arrival) which is set each time
that a cell arrives on the VC. CPU monitoring of this bit can be used to provide per-VC timeout monitoring.
In addition to the counters themselves, if one of the following per-VC counters rolls over and the
corresponding service enable bit for the counter is set, a status field indicates the address in internal
memory of the last SDT Reassembly Control Structure to generate a serviceable event.
Overall SDT Cell Counter
• As well, there is a late VC status bit and a cut VC status bit for each port (and therefore VC). These bits are set when
• Per-VC Reassembled Cell Counter
• Per-VC AAL1-byte Header Error Counter
• Per-VC AAL1-byte Sequence Error Counter
• Per-VC Lost Cell Counter
• Per-VC Misinserted Cell Counter
• Per-VC Write Underrun Counter
• Per-VC Write Overrun Counter
• Per-VC Late Cell Arrival Counter
• Per-VC Reassembled Cell Counter
• Per-VC AAL1-byte Header Error Counter
• Per-VC AAL1-byte Sequence Error Counter
• Per-VC Lost Cell Counter
• Per-VC Misinserted Cell Counter
• Per-VC Pointer Reframe Counter
• Per-VC Pointer Parity Error Counter
• Per-VC Write Underrun Counter
• Per-VC Write Overrun Counter
user-programmable timeout periods are passed without cells arriving on the VCs in question.
TX_SAR Module
UDT RX_SAR Module
SDT RX_SAR Module
Zarlink Semiconductor Inc.
MT90520
18
Data Sheet