MT90520AG ZARLINK [Zarlink Semiconductor Inc], MT90520AG Datasheet - Page 156

• Manufacturer Part Number: MT90520AG
• Description: 8-Port Primary Rate Circuit Emulation AAL1 SAR
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Output Delay - MCLK rising to
(MEM_ADD[19:0], MEM_DATA[17:0]) VALID
and (MEM_CS_X and MEM_WR) asserted
Output Hold Time - MCLK rising
MEM_DATA[17:0] INVALID
High-Z to Drive Time - MCLK rising to
MEM_DATA[17:0] driven
Clock to Change - MCLK rising to
(MEM_ADD[19:0], MEM_CS_X and MEM_WR)
change
Drive to High-Z Time - MCLK rising to
MEM_DATA[17:0] High-Z
MEM_DATA[17:0]
(flow-through)
MEM_DATA[17:0]
(pipelined)
MEM_ADD[19:0]
MEM_CS_X
MEM_WR
MCLK
Characteristic
Table 93 - External Memory Interface Timing - Write Cycle Parameters
Figure 52 - External Memory Interface Timing - Write Cycle
t
OD
t
OD
Sym.
t
t
t
t
t
t
OD
OH
OC
ZD
DZ
MH
Zarlink Semiconductor Inc.
ADDRESS VALID
t
MP
MT90520
Min.
t
ML
156
1
3
1
1
t
t
ZD
OD
Typ.
t
OC
t
t
OC
OC
DATA VALID
Max.
12.5
6.5
Units
ns
ns
ns
ns
ns
t
OH
C
C
C
C
C
DATA VALID
t
L
L
L
L
L
DZ
= 35 pF
= 35 pF
= 35 pF
= 35 pF
= 35 pF
Test Conditions
Data Sheet
V
V
V
V
V
TT
TT
TT
TT
TT
V
TT