HD6412350 Hitachi, HD6412350 Datasheet - Page 845

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HD6412350

Manufacturer Part Number
HD6412350
Description
(HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
Manufacturer
Hitachi
Datasheet

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BCRL—Bus Control Register L
Bit
Initial value
Read/Write
:
:
:
BRLE
Bus Release Enable
R/W
0
1
7
0
BREQO Pin Enable
External bus release is disabled
External bus release is enabled
0
1
BREQOE
R/W
BREQO output disabled
BREQO output enabled
6
0
Reserved
Only 0 should be written to this bit
R/W
5
1
LCAS Select
Write 0 to this bit when using the DRAM interface
LCASS
R/W
4
1
DACK Timing Select
0
1
DDS
R/W
3
1
When DMAC single address transfer is performed in
DRAM/PSRAM space, full access is always executed
DACK signal goes low from Tr or T1 cycle
Burst access is possible when DMAC single address
transfer is performed in DRAM/PSRAM space
DACK signal goes low from Tc1 or T2 cycle
H'FED5
Reserved
Only 1 should be written to this bit
R/W
2
1
Write Data Buffer Enable
0
1
WDBE
Write data buffer
function not used
Write data buffer
function used
R/W
1
0
WAIT Pin Enable
0
1
WAITE
Wait input by WAIT
pin disabled
Wait input by WAIT
pin enabled
R/W
0
0
Bus Controller
825

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