HD6412350 Hitachi, HD6412350 Datasheet - Page 154
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HD6412350
Manufacturer Part Number
HD6412350
Description
(HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
Manufacturer
Hitachi
Datasheet
1.HD6412350.pdf
(989 pages)
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6.2.6
MCR is an 8-bit readable/writable register that selects the DRAM strobe control method, number
of precharge cycles, access mode, address multiplexing shift size, and the number of wait states
inserted during refreshing, when areas 2 to 5 are designated as DRAM interface.
MCR is initialized to H'00 by a power-on reset and in hardware standby mode. It is not initialized
by a manual reset or in software standby mode.
Bit 7—TP Cycle Control (TPC): Selects whether a 1-state or 2-state precharge cycle (T
used when areas 2 to 5 designated as DRAM space are accessed.
Bit 7
TPC
0
1
Bit 6—Burst Access Enable (BE): Selects enabling or disabling of burst access to areas 2 to 5
designated as DRAM space. DRAM space burst access is performed in fast page mode.
Bit 6
BE
0
1
134
Bit
Initial value
R/W
Memory Control Register (MCR)
Description
1-state precharge cycle is inserted
2-state precharge cycle is inserted
Description
Burst disabled (always full access)
For DRAM space access, access in fast page mode
:
:
:
TPC
R/W
7
0
R/W
BE
6
0
RCDM
R/W
5
0
CW2
R/W
4
0
MXC1
R/W
3
0
MXC0
R/W
2
0
RLW1
R/W
1
0
(Initial value)
(Initial value)
RLW0
R/W
P
0
0
) is to be
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