HD6412350 Hitachi, HD6412350 Datasheet - Page 309
HD6412350
Manufacturer Part Number
HD6412350
Description
(HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
Manufacturer
Hitachi
Datasheet
1.HD6412350.pdf
(989 pages)
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8.2.3
SAR is a 24-bit register that designates the source address of data to be transferred by the DTC.
For word-size transfer, specify an even source address.
8.2.4
DAR is a 24-bit register that designates the destination address of data to be transferred by the
DTC. For word-size transfer, specify an even destination address.
8.2.5
CRA is a 16-bit register that designates the number of times data is to be transferred by the DTC.
In normal mode, the entire CRA functions as a 16-bit transfer counter (1 to 65536). It is
decremented by 1 every time data is transferred, and transfer ends when the count reaches H'0000.
In repeat mode or block transfer mode, the CRA is divided into two parts: the upper 8 bits
(CRAH) and the lower 8 bits (CRAL). CRAH holds the number of transfers while CRAL
functions as an 8-bit transfer counter (1 to 256). CRAL is decremented by 1 every time data is
transferred, and the contents of CRAH are sent when the count reaches H'00. This operation is
repeated.
Bit
Initial value
R/W
Bit
Initial value
R/W
Bit
Initial value
R/W
DTC Source Address Register (SAR)
DTC Destination Address Register (DAR)
DTC Transfer Count Register A (CRA)
:
:
:
:
:
:
:
:
:
Unde-
fined
23
Unde-
—
fined
Unde-
fined
15
—
23
—
Unde-
fined
Unde-
22
—
fined
Unde-
14
fined
—
22
—
Unde-
fined
Unde-
21
fined
—
Unde-
13
fined
—
21
—
Unde-
fined
Unde-
fined
20
—
Unde-
12
fined
—
CRAH
20
—
Unde-
Unde-
fined
fined
19
Unde-
—
11
fined
—
19
—
Unde-
fined
10
—
Unde-
fined
—
9
Unde-
fined
—
8
Unde-
fined
—
7
Unde-
fined
—
6
Unde-
fined
—
5
Unde-
fined
Unde-
Unde-
fined
—
fined
4
CRAL
—
—
4
4
Unde-
fined
Unde-
Unde-
fined
—
3
fined
—
3
—
3
Unde-
fined
Unde-
fined
—
Unde-
2
fined
—
2
—
2
Unde-
fined
Unde-
fined
—
Unde-
1
—
fined
1
—
1
Unde-
fined
Unde-
fined
—
0
Unde-
—
fined
0
—
0
289
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