HD6412350 Hitachi, HD6412350 Datasheet - Page 285
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HD6412350
Manufacturer Part Number
HD6412350
Description
(HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
Manufacturer
Hitachi
Datasheet
1.HD6412350.pdf
(989 pages)
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Figure 7-28 shows a transfer example in which TEND output is enabled and word-size single
address mode transfer (read) is performed from external 8-bit, 2-state access space to an external
device.
A one-byte or one-word transfer is performed for one transfer request, and after the transfer the
bus is released. While the bus is released, one or more bus cycles are inserted by the CPU or
DTC.
In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead
cycle is inserted after the DMA write cycle.
Address bus
DACK
TEND
RD
ø
Figure 7-28 Example of Single Address Mode (Word Read) Transfer
release
Bus
DMA read
release
Bus
DMA read
release
Bus
DMA read
Last transfer
cycle
DMA
dead
release
Bus
265
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