HD6412350 Hitachi, HD6412350 Datasheet - Page 266

• Manufacturer Part Number: HD6412350
• Description: (HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
• Manufacturer: Hitachi

7.5.7
In block transfer mode, transfer is performed with channels A and B used in combination. Block
transfer mode can be specified by setting the FAE bit in DMABCR and the BLKE bit in
DMACRA to 1.
In block transfer mode, a transfer of the specified block size is carried out in response to a single
transfer request, and this is executed the specified number of times. The transfer source is
specified by MARA, and the transfer destination by MARB. Either the transfer source or the
transfer destination can be selected as a block area (an area composed of a number of bytes or
words).
Table 7-11 summarizes register functions in block transfer mode.
Table 7-11 Register Functions in Block Transfer Mode
Register
Legend
MARA : Memory address register A
MARB : Memory address register B
ETCRA : Transfer count register A
ETCRB : Transfer count register B
MARA and MARB specify the start addresses of the transfer source and transfer destination,
respectively, as 24 bits. MAR can be incremented or decremented by 1 or 2 each time a byte or
word is transferred, or can be fixed.
Incrementing, decrementing, or holding a fixed value can be set separately for MARA and
MARB.
246
23
23
15
Block Transfer Mode
MARA
MARB
ETCRB
7
7
ETCRAH
ETCRAL
0
0
0
0
0
Function
Source address
register
Destination
address register
Holds block
size
Block size
counter
Block transfer
counter
Initial Setting
Start address of
transfer source
Start address of
transfer destination
Block size
Block size
Number of block
transfers
Operation
Incremented/decremented
every transfer, or fixed
Incremented/decremented
every transfer, or fixed
Fixed
Decremented every
transfer; ETCRH value
copied when count reaches
H'00
Decremented every block
transfer; transfer ends
when count reaches
H'0000