HD6412350 Hitachi, HD6412350 Datasheet - Page 565

• Manufacturer Part Number: HD6412350
• Description: (HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
• Manufacturer: Hitachi

Bit 3—Parity Error (PER): Indicates that a parity error occurred during reception using parity
addition in asynchronous mode, causing abnormal termination.
Bit 3
PER
0
1
Notes: 1. The PER flag is not affected and retains its previous state when the RE bit in SCR is
Bit 2—Transmit End (TEND): Indicates that there is no valid data in TDR when the last bit of
the transmit character is sent, and transmission has been ended.
The TEND flag is read-only and cannot be modified.
Bit 2
TEND
0
1
Bit 1—Multiprocessor Bit (MPB): When reception is performed using multiprocessor format in
asynchronous mode, MPB stores the multiprocessor bit in the receive data.
MPB is a read-only bit, and cannot be modified.
Bit 1
MPB
0
1
Note: * Retains its previous state when the RE bit in SCR is cleared to 0 with multiprocessor
format.
2. If a parity error occurs, the receive data is transferred to RDR but the RDRF flag is not
cleared to 0.
set. Also, subsequent serial reception cannot be continued while the PER flag is set to
1. In clocked synchronous mode, serial transmission cannot be continued, either.
Description
[Clearing condition]
When 0 is written to PER after reading PER = 1
[Setting condition]
When, in reception, the number of 1 bits in the receive data plus the parity bit does not
match the parity setting (even or odd) specified by the O/E bit in SMR*
Description
[Clearing conditions]
[Setting conditions]
Description
[Clearing condition]
When data with a 0 multiprocessor bit is received
[Setting condition]
When data with a 1 multiprocessor bit is received
When 0 is written to TDRE after reading TDRE = 1
When the DMAC or DTC is activated by a TXI interrupt and write data to TDR
When the TE bit in SCR is 0
When TDRE = 1 at transmission of the last bit of a 1-byte serial transmit character
2
(Initial value)*
(Initial value)*
(Initial value)
545
1