HD6412350 Hitachi, HD6412350 Datasheet - Page 625

• Manufacturer Part Number: HD6412350
• Description: (HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
• Manufacturer: Hitachi

14.3.4
Table 14-3 shows a bit map of the registers used by the smart card interface.
Bits indicated as 0 or 1 must be set to the value shown. The setting of other bits is described
below.
Table 14-3 Smart Card Interface Register Settings
Register
SMR
BRR
SCR
TDR
SSR
RDR
SCMR
Notes: — : Unused bit.
SMR Setting: The GM bit is cleared to 0 in normal smart card interface mode, and set to 1 in
GSM mode. The O/E bit is cleared to 0 if the IC card is of the direct convention type, and set to 1
if of the inverse convention type.
Bits CKS1 and CKS0 select the clock source of the on-chip baud rate generator. See section
14.3.5, Clock.
BRR Setting: BRR is used to set the bit rate. See section 14.3.5, Clock, for the method of
calculating the value to be set.
SCR Setting: The function of the TIE, RIE, TE, and RE bits is the same as for the normal SCI.
For details, see section 13, Serial Communication Interface.
Bits CKE1 and CKE0 specify the clock output. When the GM bit in SMR is cleared to 0, set these
bits to B'00 if a clock is not to be output, or to B'01 if a clock is to be output. When the GM bit in
SMR is set to 1, clock output is performed. The clock output can also be fixed high or low.
*: The CKE1 bit must be cleared to 0 when the GM bit in SMR is cleared to 0.
Register Settings
Bit 7
GM
BRR7
TIE
TDR7
TDRE
RDR7
—
Bit 6
0
BRR6
RIE
TDR6
RDRF
RDR6
—
Bit 5
1
BRR5
TE
TDR5
ORER
RDR5
—
Bit 4
O/E
BRR4
RE
TDR4
ERS
RDR4
—
Bit
Bit 3
1
BRR3
0
TDR3
PER
RDR3
SDIR
Bit 2
0
BRR2
0
TDR2
TEND
RDR2
SINV
Bit 1
CKS1
BRR1
CKE1*
TDR1
0
RDR1
—
Bit 0
CKS0
BRR0
CKE0
TDR0
0
RDR0
SMIF
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