OX16PCI952-TQAG OXFORD [Oxford Semiconductor], OX16PCI952-TQAG Datasheet - Page 29

• Manufacturer Part Number: OX16PCI952-TQAG
• Description: Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
• Manufacturer: OXFORD [Oxford Semiconductor]

7
Each of the internal UARTs in the OX16PCI952 is an OX16C950 rev B specification high-performance serial port. The features
of this UART are described in this section.
7.1
The UART is backward compatible with the 16C450, 16C550, 16C654 and 16C750 UARTs. The operation of the port depends
on a number of mode settings, which are referred to throughout this section. The modes, conditions and corresponding FIFO
depth are tabulated below:
Note 1: 950 mode configuration is identical to 650 configuration
7.1.1
After a hardware reset, bit 0 of the FIFO Control Register
(‘FCR’) is cleared, hence the UART is compatible with the
16C450. The transmitter and receiver FIFOs (referred to as
the ‘Transmit Holding Register’ and ‘Receiver Holding
Register’ respectively) have a depth of one. This is referred
to as ‘Byte mode’. When FCR[0] is cleared, all other mode
selection parameters are ignored.
7.1.2
After a hardware reset, writing a 1 to FCR[0] will increase
the FIFO size to 16, providing compatibility with 16C550
devices.
7.1.3
Writing a 1 to FCR[0] will increase the FIFO size to 16. In a
similar fashion to 16C750, the FIFO size can be further
increased to 128 by writing a 1 to FCR[5]. Note that access
to FCR[5] is protected by LCR[7]. i.e., to set FCR[5],
software should first set LCR[7] to temporarily remove the
guard. Once FCR[5] is set, the software should clear
LCR[7] for normal operation.
The 16C750 additional features are available as long as
the UART is not put into Enhanced mode; i.e. ensure
EFR[4] = ‘0’. These features are:
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DS-0028 Jul 05
OXFORD SEMICONDUCTOR LTD.
Deeper FIFOs
Automatic RTS/CTS out-of-band flow control
I
NTERNAL
Operation – mode selection
450 Mode
550 Mode
750 Mode
Extended 550
UART Mode
950
450
550
650
750
OX16C950 UART
1
FIFO
size
128
128
128
128
16
1
FCR[0]
0
1
1
1
1
1
Table 8: UART Mode Configuration
Enhanced mode
External-Free Release
(EFR[4]=1)
X
0
0
1
0
1
•
7.1.4
The OX16PCI952 UART is compatible with the 16C650
when EFR[4] is set, i.e. the device is in Enhanced mode.
As 650 software drivers usually put the device in Enhanced
mode, running 650 drivers on the one of the UART
channels will result in 650 compatibility with 128 deep
FIFOs, as long as FCR[0] is set. Note that the 650
emulation mode of the OX16PCI952 provides 128-deep
FIFOs rather than the 32 provided by a legacy 16C650.
In enhanced (650) mode the device has the following
features available over those provided by a generic 550.
(Note: some of these are similar to those provided in 750
mode, but enabled using different registers).
•
•
•
•
•
•
•
(guarded with LCR[7] = 1)
Sleep mode
Deeper FIFOs
Sleep mode
Automatic in-band flow control
Special character detection
Infra-red “IrDA-format” transmit and receive mode
Transmit trigger levels
Optional clock prescaler
650 Mode
FCR[5]
X
X
X
X
0
1
FIFOSEL
Pin
X
X
X
0
1
0
OX16PCI952
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