SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 33

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SCH3112I-NE

Manufacturer Part Number
SCH3112I-NE
Description
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Manufacturer
SMSC [SMSC Corporation]
Datasheet
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
PIN
33
32
31
30
83
84
81
82
95
96
85
86
87
88
89
92
NOTE
2.11,
2.13
2.13
2.13
2.13
2.9
2.9
2.9
2.9
2.9
2.9
2.9
2.9
2.9
nPCIRST3 /
GP47
nPCIRST2 /
GP46
nPCIRST1 /
GP45
nIDE_RST
DRV /
GP44
PB_IN# /
SLP_SX#
PB_OUT#
PS_ON#
GP13 /
nRI3
GP12 /
nDCD3
GP10 /
RXD3
GP11 /
TXD3
GP14 /
nDSR3
GP17 /
nRTS3/
GP16 /
nCTS3
GP15 /
nDTR3
NAME
Table 2.6 SCH3114 Specific Signals (
PCI Reset output 3
GPIO with schmidt
trigger input
PCI Reset output 2
GPIO with schmidt
trigger input
PCI Reset output1
GPIO with schmidt
trigger input
IDE Reset output
GPIO with schmidt
trigger input
Power Button In is used
to detect a power button
event /
/
Power Button Out/
Power supply On/
GPIO /
Ring Indicator 3
GPIO /
Data Carrier Detect 3
GPIO /
Receive Data 3
GPIO /
Transmit Data 3
GPIO /
Data Set Ready 3
GPIO /
Request to Send 3
GPIO /
Clear to Send 3
GPIO /
Data Terminal Ready 3
Sx Sleep State Input Pin.
DESCRIPTION
SERIAL PORT 3 INTERFACE (8)
SERIAL PORT 4 INTERFACE (8)
DATASHEET
GLUE LOGIC
17
nDCD3
GP10 /
RXD3
TXD3
nDSR3
GP17 /
nRTS3/
GP16 /
nCTS3
GP15 /
nDTR3
POWER
PLANE
VCC
Note
GP47 /
nPCIRST
3
nPCIRST
2
GP45 /
nPCIRST
1
GP44 /
nIDE_RS
TDRV
PB_IN#
SLP_SX#
PB_OUT
#
PS_ON#
GP13 /
nRI3
GP12
GP11
GP14
POWER
PLANE
2.15)
VTR-
(Note 2.1
OPERA-
VCC=0
GATE
GATE
GATE
GATE
GATE
GATE
GATE
GATE
GATE
GATE
GATE
TION
HI-Z
HI-Z
HI-Z
HI-Z
HI-Z
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
6)
/
/
/
/
/
Rev 0.2 (09-28-04)
I/
IO8
I
IS
O12
I
OP14 /
I
I
O6
(IO8/IOD8)
(IO8/IOD8)
(IO8/IOD8)
(IO8/IOD8)
(O8/OD8)
(O8/OD8)
(Note
BUFFER
MODES
OD8 /
(O12)
IS
I/
I/
I
2.1)

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