SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 181

• Manufacturer Part Number: SCH3112I-NE
• Description: LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
• Manufacturer: SMSC [SMSC Corporation]

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
SMSC SCH311X
18.2
18.3
Name
t1
t2
RSM RST#=1
PS_ON#
PW RGD_OUT
RSM RST#=1
3.3V or 5V or 12V
PW RGD_OUT
Description
PS_ON# pin high to PWRGD_OUT pin low
Power supply (at pin) drop below threshold to PWRGD_OUT pin low
the following figure illustrates the reset generation pulse timing based on normal power down and
voltage trip conditions.
Note: The time from the input pin to the output pin includes the output buffer delay.
The 5V supply is scaled internally. The input resistance is 20kohms (min). The voltage trip point is
4.45V (nominal) with a tolerance of ± 0.15V (range: 4.3V-4.6V).
For the 3.3V VTR and 3.3V supplies, the voltage trip point is 2.8V (nominal) with a tolerance of ±0.1V
(range: 2.7V-2.9V).
PWRGD_OUT TIming
Power Supply Voltage Scaling and Tolerances
(b) Power Down Due to Drop in Power Supply
(a) Norm al Power Down Due to PS_ON# Deasserted
Threshold
Figure 18.2 PWRGD_OUT Timing
Table 18.3 PWRGD_OUT Timing
t1
t2
DATASHEET
165
1
Typical Value
3
15
Rev 0.2 (09-28-04)
Units
ns
ns