SCH3112I-NE SMSC [SMSC Corporation], SCH3112I-NE Datasheet - Page 364
SCH3112I-NE
Manufacturer Part Number
SCH3112I-NE
Description
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.SCH3112I-NE.pdf
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Rev 0.2 (09-28-04)
29.1
29.2
NAME
t1
t2
t3
NAME
t1
t2
CLOCKI
A l l H o s t
A c c e s s e s
DESCRIPTION
Clock Cycle Time for 14.318MHZ
Clock High Time/Low Time for 14.318MHz
Clock Rise Time/Fall Time (not shown)
DESCRIPTION
Vcc Slew from 2.7V to 0V
Vcc Slew from 0V to 2.7V
All Host Accesses After Power-up (See
Note 29.1 Internal write-protection period after Vcc passes 2.7 volts on power-up
Power Up Timing
Input Clock Timing
V c c
t 1
Figure 29.2 Input Clock Timing
Figure 29.1 Power-Up Timing
DATASHEET
LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Note
t1
348
29.1)
t2
MIN
300
100
125
t 2
MIN
20
TYP
t 3
TYP
69.84
35
t2
MAX
500
MAX
5
SMSC SCH311X
UNITS
ns
ns
ns
UNITS
?s
?s
?s
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