AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 37
AT83C51SND1C_03
Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT83C51SND1C_03.pdf
(210 pages)
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4109E–8051–06/03
Table 49. Priority Levels
A low-priority interrupt is always interrupted by a higher priority interrupt but not by
another interrupt of lower or equal priority. Higher priority interrupts are serviced before
lower priority interrupts. The response to simultaneous occurrence of equal priority inter-
rupts is determined by an internal hardware polling sequence detailed in Table 50.
Thus, within each priority level there is a second priority structure determined by the
polling sequence. The interrupt control system is shown in Figure 21.
Table 50. Priority within Same Level
Interrupt Name
INT0
Timer 0
INT1
Timer 1
Serial Port
MP3 Decoder
Audio Interface
MMC Interface
Two Wire Controller
SPI Controller
A to D Converter
Keyboard
Reserved
USB
Reserved
IPHxx
0
0
1
1
15 (Lowest Priority)
1 (Highest Priority)
Priority Number
IPLxx
10
11
12
13
14
2
3
4
5
6
7
8
9
0
1
0
1
Priority Level
0 Lowest
1
2
3 Highest
Interrupt Address
Vectors
C:000Bh
C:001Bh
C:002Bh
C:003Bh
C:004Bh
C:005Bh
C:006Bh
C:0003h
C:0013h
C:0023h
C:0033h
C:0043h
C:0053h
C:0063h
C:0073h
AT8xC51SND1C
Interrupt Request Flag
(H) or by Software (S)
Cleared by Hardware
H if edge, S if level
H if edge, S if level
H
H
S
S
S
S
S
S
S
S
S
-
-
37
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