AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 108

• Manufacturer Part Number: AT83C51SND1C_03
• Description: Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
• Manufacturer: ATMEL [ATMEL Corporation]

108
AT8xC51SND1C
Table 103. UFNUMH Register
UFNUMH (S:BBh, Read-only) – USB Frame Number High Register
Reset Value = 00h
Table 104. USBCLK Register
USBCLK (S:EAh) – USB Clock Divider Register
Reset Value = 0000 0000b
Number
Number
7 - 3
7 - 2
1 - 0
Bit
2-0
Bit
7
5
4
3
7
-
-
Mnemonic Description
Mnemonic Description
USBCD1:0
FNUM10:8
CRCERR
CRCOK
Bit
Bit
6
6
-
-
-
-
-
Reserved
The value read from these bits is always 0. Do not set these bits.
Frame Number CRC OK Bit
Set by hardware after a non corrupted Frame Number in Start of Frame Packet is
received.
Updated after every Start Of Frame packet reception.
Note: The Start Of Frame interrupt is generated just after the PID receipt.
Frame Number CRC Error Bit
Set by hardware after a corrupted Frame Number in Start of Frame Packet is
received.
Updated after every Start Of Frame packet reception.
Note: The Start Of Frame interrupt is generated just after the PID receipt.
Reserved
The value read from this bits is always 0. Do not set this bit.
Frame Number
Upper 3 bits of the 11-bit Frame Number. It is provided in the last received SOF
packet. FNUM does not change if a corrupted SOF is received.
Reserved
The value read from these bits is always 0. Do not set these bits.
USB Controller Clock Divider
2-bit divider for USB controller clock generation.
CRCOK
5
5
-
CRCERR
4
4
-
3
3
-
-
FNUM10
2
2
-
USBCD1
FNUM9
1
1
4109E–8051–06/03
USBCD0
FNUM8
0
0