AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 128

• Manufacturer Part Number: AT83C51SND1C_03
• Description: Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
• Manufacturer: ATMEL [ATMEL Corporation]

128
AT8xC51SND1C
Table 116. MMINT Register
MMINT (S:E7h Read Only) – MMC Interrupt Register
Reset Value = 0000 0011b
Number
MCBI
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
EORI
MCBI
EORI
EOCI
EOFI
F2EI
F1EI
F2FI
F1FI
Bit
6
MMC Card Busy Interrupt Flag
Set by hardware when the card enters or exits its busy state (when the busy
signal is asserted or deasserted on the data line).
Cleared when reading MMINT.
End of Response Interrupt Flag
Set by hardware at the end of response reception.
Cleared when reading MMINT.
End of Command Interrupt Flag
Set by hardware at the end of command transmission.
Clear when reading MMINT.
End of Frame Interrupt Flag
Set by hardware at the end of frame (stream or block) transfer.
Clear when reading MMINT.
FIFO 2 Full Interrupt Flag
Set by hardware when second FIFO becomes full.
Cleared by hardware when second FIFO becomes empty.
FIFO 1 Full Interrupt Flag
Set by hardware when first FIFO becomes full.
Cleared by hardware when first FIFO becomes empty.
FIFO 2 Empty Interrupt Flag
Set by hardware when second FIFO becomes empty.
Cleared by hardware when second FIFO becomes full.
FIFO 1 Empty Interrupt Flag
Set by hardware when first FIFO becomes empty.
Cleared by hardware when first FIFO becomes full.
EOCI
5
EOFI
4
F2FI
3
F1FI
2
F2EI
1
4109E–8051–06/03
F1EI
0