AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 132

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AT83C51SND1C_03

Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
IDE Device Connection
132
AT8xC51SND1C
Figure 91. IDE Write Waveforms
Notes:
Figure 92 and Figure 93 show 2 examples on how to interface up to 2 IDE devices to the
AT8xC51SND1C. In both examples P0 carries IDE low order data bits D7:0, P2 carries
IDE high order data bits D15:8, while RD and WR signals are respectively connected to
the IDE nIOR and nIOW signals. Other IDE control signals are generated by the exter-
nal address latch outputs in the first example while they are generated by some port
I/Os in the second one. Using an external latch will achieve higher transfer rate.
Figure 92. IDE Device Connection Example 1
Figure 93. IDE Device Connection Example 2
CPU Clock
WR
ALE
AT8xC51SND1C
P0
P2
1.
2. When executing MOVX @Ri instruction, P2 outputs SFR content.
3. When executing MOVX @DPTR instruction, if DPHDIS is set (Page Access Mode),
AT8xC51SND1C
(1)
WR
P2 outputs SFR content instead of DPH.
P0/AD7:0
P2/A15:8
P2
signal may be stretched using M0 bit in AUXR register.
P4.2:0
P4.4:3
P4.5
Px.y
ALE
WR
WR
RD
RD
P2
P0
DPH or P2
DPL or Ri
(2),(3)
Latch
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
IDE Device 0
IDE Device 0
D15:8
D7:0
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
IDE Device 1
IDE Device 1
4109E–8051–06/03
P2

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