mt90868ag2 Zarlink Semiconductor, mt90868ag2 Datasheet - Page 31

• Manufacturer Part Number: mt90868ag2
• Description: 32,768 X 8,192 Channels High Bandwidth Digital Switch With Up To 128 Streams On Backplane And 128 Streams On Local And Data Rates From 8 To 32 Mbps
• Manufacturer: Zarlink Semiconductor

Data Sheet
tristate output channels. For example, if we program channel 0 of the LSTo4 to be tristated, the control bit
LSTo4_Ch0 will set to high.
With the local output channel advancement feature disabled, the LCSTo0 output is advanced by nine C8o cycles
from the frame boundary to send out the control bit for the channel 0 of the LSTo0 stream. Similarly, the LCSTo1,
LCSTo2 and LCSTo3 outputs are advanced by nine C8o cycles for the channel 0 of the LSTo1; LSTo2 and LSTo3
output streams respectively. The advancement in the LCSTo streams allows the external drivers or buffers to
process the LCSTo control bits accordingly before the actual LSTo data is output from the device.
When the local output channel advancement feature is enabled, LCSTo signals for those advanced output channels
will also be advanced together with the actual channel outputs. Figure 16 describes the Local External Tristate
Control Timing.
The ODE and RESET pins also control the LCSTo pins. See Table 5, the OSB bit description in the control register.
4.7
The MT90868 offers users the Bit Error Rate (BER) test feature for the backplane and local interfaces. The circuitry
of the BER test consists of a transmitter and a receiver on both interfaces which can transmit and receive the BER
patterns independently. The transmitter can output pseudo random patterns of the form 2
anywhere in the frame and last a minimum of one channel and a maximum of one frame time (125µs). The BER
test mode is activated by setting the LTM1 - LTM0 bits to "11" or the BTM1 - BTM0 bits to "11" in the local and the
LCSTo0
LCSTo1
LCSTo2
LCSTo3
LSTo63
LSTo0
FP8o
C8o
Bit Error Rate Test
Ch127
Ch127
1
1
0
0
7
7
Ch 0
Ch 0
6
6
Figure 16 - Local External Tristate Control Timing
5
5
4
4
Zarlink Semiconductor Inc.
3
3
Ch 126
Ch 126
2
2
1
1
0
0
7
7
6
6
Nine C8o cycles
5
5
Ch127
4
4
Ch127
3
3
2
2
1
1
15
0
0
- 1 which can start
7
7
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