mt90868ag2 Zarlink Semiconductor, mt90868ag2 Datasheet - Page 11

• Manufacturer Part Number: mt90868ag2
• Description: 32,768 X 8,192 Channels High Bandwidth Digital Switch With Up To 128 Streams On Backplane And 128 Streams On Local And Data Rates From 8 To 32 Mbps
• Manufacturer: Zarlink Semiconductor

Data Sheet
Pin Description (continued)
AC13, AD14, AF15, AE15, AC15,
AE17, AD17, AC17, AF18, AE18,
AD18, AC18, AF19, AE19, AD19,
AF16, AE16, AD16, AC16, AF17,
AE14, AD11, AD12, AD13, AC9,
AC11, AD10, AC10, AD9, AC14,
PBGA Ball Number
AD15.
AC19.
AE21
AE20
AF13
AF12
AF11
AF14
AE11
AF21
AF20
B12
A12
A11
D0 - D15
A0 - A15
Name
SG1
TMS
TM1
TM2
DT1
R/W
DTA
TCK
AT1
TDi
CS
DS
Zarlink Semiconductor Inc.
APLL Test Pin 1 (3.3V Tolerant Input): Used for APLL
testing only. In normal operation, this input MUST be low.
APLL Test Pin 2 (3.3V Tolerant Input): Used for APLL
testing only. In normal operation, this input MUST be low.
APLL Test Control (3.3V Tolerant Input): Used for APLL
testing only. In normal operation, this input MUST be low.
Analog Test Access (3.3V Tolerant I/O): Used for APLL
testing only. This pin is pulled low by an internal pull-down
resistor. No connection for normal operation.
Digital Test Access (3.3V Output): Used for APLL
testing only. No connect for normal operation.
Chip Select (5V Tolerant Input): Active low input used
by the microprocessor to enable the microprocessor port
access.
Data Strobe (5V Tolerant Input): This active low input
works in conjunction with CS to enable the
microprocessor port read and write operations.
Read/Write (5V Tolerant Input): This input controls the
direction of the data bus lines (D0-D15) during a
microprocessor access.
Address 0 - 15 (5V Tolerant Inputs): These pins form
the 16-bit address bus of the microprocessor port.
Data Bus 0 - 15 (5V Tolerant I/Os): These pins form the
16-bit data bus of the microprocessor port.
Data Transfer Acknowledgment (5V Tolerant Output):
This active low output indicates that a data bus transfer is
complete. A pull-up resistor is required to hold at HIGH
level.
Test Mode Select (5V Tolerant Input with internal pull-
up): JTAG signal that controls the state transitions of the
TAP controller. This pin is pulled high by an internal pull-
up resistor when it is not driven.
Test Clock (5V Tolerant Input): Provides the clock to the
JTAG test logic.
Test Serial Data In (5V Input with internal pull-up):
JTAG serial test instructions and data are shifted in on this
pin. This pin is pulled high by an internal pull-up resistor
when it is not driven.
Description
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