mpc8569e Freescale Semiconductor, Inc, mpc8569e Datasheet - Page 88

• Manufacturer Part Number: mpc8569e
• Description: Mpc8569e Powerquicc Iii Integrated Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

PCI Express
The following table defines the AC specifications for the PCI Express (2.5 Gb/s) differential input at all receivers (RXs). The
parameters are specified at the component pins. The AC timing specifications do not include RefClk jitter.
At recommended operating conditions with ScoreVDD = 1.0 V ± 3%. and 1.1 V ± 3%
88
Unit interval
Minimum
receiver eye
width
Maximum time
between the
jitter median
and maximum
deviation from
the median.
Notes:
1. No test load is necessarily associated with this value.
2. Specified at the measurement point and measured over any 250 consecutive UIs. The test load in
3. A T
4. It is recommended that the recovered TX UI is calculated using all edges in the 3500 consecutive UI interval with a fit algorithm
Parameter
the RX device when taking measurements. If the clocks to the RX and TX are not derived from the same reference clock, the
TX UI recovered from 3500 consecutive UI must be used as a reference for the eye diagram.
interconnect collected any 250 consecutive UIs. The T
which the median and the maximum deviation from the median is less than half of the total. UI jitter budget collected over any
250 consecutive TX UIs. It must be noted that the median is not the same as the mean. The jitter median describes the point
in time where the number of jitter points on either side is approximately equal as opposed to the averaged time value. If the
clocks to the RX and TX are not derived from the same reference clock, the TX UI recovered from 3500 consecutive UI must
be used as the reference for the eye diagram.
using a minimization merit function. Least squares and median deviation fits have worked well with experimental and
simulated data.
RX-EYE
= 0.40 UI provides for a total sum of 0.60 UI deterministic and random jitter budget for the transmitter and
Table 51. PCI Express (2.5 Gb/s) Differential Receiver (RX) Input AC Specifications
UI
T
T
N-to-MAX-JITTER
RX-EYE
RX-EYE-MEDIA
Symbol
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
399.88 400.00 400.12
Min
0.4
—
Typ
—
—
Max
0.3
—
RX-EYE-MEDIAN-to-MAX-JITTER
Unit
ps
UI
UI
Each UI is 400 ps ± 300 ppm. UI does not account for
spread spectrum clock dictated variations. See Note 1.
The maximum interconnect media and transmitter jitter
that can be tolerated by the receiver can be derived as
T
Jitter is defined as the measurement variation of the
crossing points (V
recovered TX UI. A recovered TX UI is calculated over
3500 consecutive unit intervals of sample data. Jitter is
measured using all edges of the 250 consecutive UI in the
center of the 3500 UI used for calculating the TX UI.
See Notes 2, 3, and 4.
RX-MAX-JITTER
= 1 – T
specification ensures a jitter distribution in
RX-DIFFp-p
RX-EYE
Comments
= 0 V) in relation to a
= 0.6 UI. See Notes 2 and 3.
Figure 46
Freescale Semiconductor
must be used as