mpc8569e Freescale Semiconductor, Inc, mpc8569e Datasheet - Page 112

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mpc8569e

Manufacturer Part Number
mpc8569e
Description
Mpc8569e Powerquicc Iii Integrated Processor Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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SPI Interface
For recommended operating conditions, see
The following figure provides the AC test load for the SPI.
Figure 65
rising edge of the clock, these AC timing diagrams also apply when the falling edge is the active edge.
The following figure shows the SPI timing in slave mode (external clock).
112
SPI inputs—Master mode (internal clock) input setup time
SPI inputs—Master mode (internal clock) input hold time
SPI inputs—Slave mode (external clock) input setup time
SPI inputs—Slave mode (external clock) input hold time
Note:
1
2. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings are
The symbols used for timing specifications follow the pattern of t
inputs and t
timing (NI) for the time SPICLK clock reference (K) goes to the high state (H) until outputs (O) are invalid (X).
measured at the pin.
SPICLK (output)
Output Signals:
Note: The clock edge is selectable on SPI.
Input Signals:
and
(See Note)
(See Note)
(first two letters of functional block)(reference)(state)(signal)(state)
SPIMISO
SPIMOSI
Figure 66
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
Figure 65. SPI AC Timing in Slave Mode (External Clock) Diagram
represent the AC timing from
Parameter
Output
Table 74. SPI AC Timing Specifications (continued)
Table 3
t
NEIVKH
Figure 64. SPI AC Test Load
t
NEKHOV
Z
0
= 50 Ω
Table
t
NEIXKH
74. Note that although the specifications generally reference the
Symbol
t
t
t
t
NEIVKH
NEIXKH
(first two letters of functional block)(signal)(state) (reference)(state)
NIIVKH
NIIXKH
for outputs. For example, t
1
R
L
= 50 Ω
Min
4
0
4
2
OV
Max
DD
t
NIKHOX
NEKHOX
/2
Freescale Semiconductor
symbolizes the internal
Unit
ns
ns
ns
ns
Note
for

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